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path: root/drivers/clk
AgeCommit message (Expand)AuthorFilesLines
2018-03-13clk: meson: add mpll pre-dividerJerome Brunet6-13/+65
2018-03-13clk: meson: axg: add hifi pll clockJerome Brunet2-1/+56
2018-03-13clk: meson: add ROUND_CLOSEST to the pll driverJerome Brunet2-4/+15
2018-03-13clk: meson: add gp0 frac parameter for axg and gxlJerome Brunet2-2/+12
2018-03-13clk: meson: improve pll driver results with fracJerome Brunet2-59/+91
2018-03-13clk: meson: remove special gp0 lock loopJerome Brunet4-15/+1
2018-03-13clk: meson: poke pll CNTL lastJerome Brunet2-3/+3
2018-03-13clk: meson: add fractional part of meson8b fixed_pllJerome Brunet1-0/+5
2018-03-13clk: meson: use hhi syscon if availableJerome Brunet3-24/+60
2018-03-13clk: meson: remove obsolete cpu_clkJerome Brunet3-190/+1
2018-03-13clk: meson: rework meson8b cpu clockJerome Brunet2-61/+119
2018-03-13clk: meson: split divider and gate part of mpllJerome Brunet8-118/+197
2018-03-13clk: meson: migrate plls clocks to clk_regmapJerome Brunet5-530/+535
2018-03-13clk: meson: migrate the audio divider clock to clk_regmapJerome Brunet3-68/+30
2018-03-13clk: meson: migrate mplls clocks to clk_regmapJerome Brunet5-354/+313
2018-03-13clk: meson: add regmap helpers for parmJerome Brunet1-0/+16
2018-03-13clk: meson: migrate muxes to clk_regmapJerome Brunet3-213/+184
2018-03-13clk: meson: migrate dividers to clk_regmapJerome Brunet3-159/+142
2018-03-13clk: meson: migrate gates to clk_regmapJerome Brunet5-195/+206
2018-03-13clk: meson: add regmap to the clock controllersJerome Brunet4-12/+52
2018-03-13clk: meson: remove superseded aoclk_gate_regmapJerome Brunet2-56/+0
2018-03-13clk: meson: switch gxbb ao_clk to clk_regmapJerome Brunet4-12/+12
2018-03-13clk: meson: add regmap clocksJerome Brunet4-0/+282
2018-03-13clk: meson: remove obsolete commentsJerome Brunet3-12/+0
2018-03-13clk: meson: only one loop index is necessary in probeJerome Brunet3-15/+14
2018-03-13clk: meson: use devm_of_clk_add_hw_providerJerome Brunet3-6/+7
2018-03-13clk: meson: use dev pointer where possibleJerome Brunet2-5/+5
2018-03-13Merge branch 'topic/pll-fixes' into next/driversNeil Armstrong6-201/+140
2018-03-13clk: imx6ull: Add epdc_podf instead of sim_podfLeonard Crestez1-1/+4
2018-03-12clk: qcom: msm8916: Fix return value check in qcom_apcs_msm8916_clk_probe()Wei Yongjun1-3/+2
2018-03-12clk: hisilicon: hi3660:Fix potential NULL dereference in hi3660_stub_clk_pr...Wei Yongjun1-0/+2
2018-03-12Merge branch 'clk-helpers' (early part) into clk-fixesStephen Boyd1-1/+3
2018-03-12clk: qcom: use divider_ro_round_rate helperJerome Brunet1-14/+6
2018-03-12clk: divider: read-only divider can propagate rate changeJerome Brunet1-6/+30
2018-03-12clk: call the clock init() callback before any other ops callbackJerome Brunet1-11/+11
2018-03-12clk: mux: add helper function for index/value translationJerome Brunet1-32/+43
2018-03-12clk: divider: export clk_div_mask() helperJerome Brunet1-13/+11
2018-03-12clk: fix determine rate error with pass-through clockJerome Brunet1-1/+3
2018-03-12Merge branch 'clk-phase' into clk-fixesStephen Boyd1-1/+4
2018-03-12Merge tag 'ti-clk-fixes-4.16' of https://github.com/t-kristo/linux-pm into cl...Stephen Boyd3-2/+4
2018-03-12Merge tag 'clk-imx-fixes-4.16' of git://git.kernel.org/pub/scm/linux/kernel/g...Stephen Boyd1-3/+17
2018-03-12Merge tag 'sunxi-clk-fixes-for-4.16' of https://git.kernel.org/pub/scm/linux/...Stephen Boyd1-3/+3
2018-03-12clk: migrate the count of orphaned clocks at initJerome Brunet1-16/+21
2018-03-12clk: tegra: Fix pll_u rate configurationMarcel Ziswiler1-0/+2
2018-03-12clk: tegra: Specify VDE clock rateDmitry Osipenko4-1/+4
2018-03-12clk: tegra20: Correct PLL_C_OUT1 setupDmitry Osipenko1-3/+3
2018-03-12clk: tegra: Mark HCLK, SCLK and EMC as criticalDmitry Osipenko8-36/+26
2018-03-12clk: samsung: exynos5420: Add more entries to EPLL rate tableSylwester Nawrocki1-0/+3
2018-03-12clk: samsung: exynos5420: Add CLK_SET_RATE_PARENT flag to mout_mau_epll_clkSylwester Nawrocki1-1/+2
2018-03-12clk: hi3798cv200: add emmc sample and drive clocktianshuliang1-0/+20