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2022-07-08arm64: dts: qcom: sc8280xp: fix DP PHY node unit addressesJohan Hovold1-1/+1
Fix up the DP PHY node which had the wrong unit address. Signed-off-by: Johan Hovold <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-08arm64: dts: qcom: sc8280xp: fix usb_0 HS PHY ref clockJohan Hovold1-1/+1
Fix the usb_0 HS PHY reference clock which was mistakingly replaced with the first usb_2 PHY clock. Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") Signed-off-by: Johan Hovold <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-08arm64: dts: qcom: sc7280: fix PCIe clock referenceJohan Hovold1-1/+1
The recent commit that dropped the PCIe PHY clock index failed to update the PCIe node reference. Fixes: 531c738fb360 ("arm64: dts: qcom: sc7280: drop PCIe PHY clock index") Reported-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-08docs: arm: index.rst: add google/chromebook-boot-flowMauro Carvalho Chehab1-0/+2
This document was added without placing it at arm book. Fixes: 59228d3b9060 ("dt-bindings: Document how Chromebooks with depthcharge boot") Signed-off-by: Mauro Carvalho Chehab <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/0ae8251f97c642cfd618f2e32eb1e66339e5dfde.1656759989.git.mchehab@kernel.org
2022-07-06arm64: dts: qcom: msm8996: clean up PCIe PHY nodeJohan Hovold1-10/+17
Clean up the PCIe PHY node by renaming the wrapper node and grouping the child node properties. Signed-off-by: Johan Hovold <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: msm8996: use non-empty ranges for PCIe PHYsJohan Hovold1-13/+13
Clean up the PCIe PHY nodes by using a non-empty ranges property. Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: sm8450: drop UFS PHY clock-cellsJohan Hovold1-1/+0
The QMP UFS PHY provides more than one symbol clock and would need an index to differentiate the clocks, but none of this is described by the binding currently. Drop the incorrect '#clock-cells' property for now. Signed-off-by: Johan Hovold <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: sm8250: drop UFS PHY clock-cellsJohan Hovold1-1/+0
The QMP UFS PHY provides more than one symbol clock and would need an index to differentiate the clocks, but none of this is described by the binding currently. Drop the incorrect '#clock-cells' property for now. Signed-off-by: Johan Hovold <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: sc8280xp: drop UFS PHY clock-cellsJohan Hovold1-2/+0
The QMP UFS PHY provides more than one symbol clock and would need an index to differentiate the clocks, but none of this is described by the binding currently. Drop the incorrect '#clock-cells' property for now. Signed-off-by: Johan Hovold <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: sm8450: drop USB PHY clock indexJohan Hovold1-1/+1
The QMP USB PHY provides a single clock so drop the redundant clock index. Signed-off-by: Johan Hovold <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: sm8350: drop USB PHY clock indexJohan Hovold1-2/+2
The QMP USB PHY provides a single clock so drop the redundant clock index. Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: msm8998: drop USB PHY clock indexJohan Hovold1-1/+1
The QMP USB PHY provides a single clock so drop the redundant clock index. Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: ipq8074: drop USB PHY clock indexJohan Hovold1-2/+2
The QMP USB PHY provides a single clock so drop the redundant clock index. Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: ipq6018: drop USB PHY clock indexJohan Hovold1-1/+1
The QMP USB PHY provides a single clock so drop the redundant clock index. Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: sm8250: add missing PCIe PHY clock-cellsJohan Hovold1-0/+6
Add the missing '#clock-cells' properties to the PCIe QMP PHY nodes. Signed-off-by: Johan Hovold <[email protected]> Fixes: e53bdfc00977 ("arm64: dts: qcom: sm8250: Add PCIe support") Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: sc7280: drop PCIe PHY clock indexJohan Hovold1-2/+2
The QMP PCIe PHY provides a single clock so drop the redundant clock index. Signed-off-by: Johan Hovold <[email protected]> Fixes: bd7d507935ca ("arm64: dts: qcom: sc7280: Add pcie clock support") Fixes: 92e0ee9f83b3 ("arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes") Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06Revert "arm64: dts: qcom: Fix 'reg-names' for sdhci nodes"Douglas Anderson6-8/+8
This reverts commit afcbe252e9c19161e4d4c95f33faaf592f1de086. The commit in question caused my sc7280-herobrine-herobrine-r1 board not to boot anymore. This shouldn't be too surprising since the driver is relying on the name "cqhci". The issue seems to be that someone decided to change the names of things when the binding moved from .txt to .yaml. We should go back to the names that the bindings have historically specified. For some history, see commit d3392339cae9 ("mmc: cqhci: Update cqhci memory ioresource name") and commit d79100c91ae5 ("dt-bindings: mmc: sdhci-msm: Add CQE reg map"). Fixes: afcbe252e9c1 ("arm64: dts: qcom: Fix 'reg-names' for sdhci nodes") Signed-off-by: Douglas Anderson <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/20220706144706.1.I48f35820bf3670d54940110462555c2d0a6d5eb2@changeid
2022-07-06arm64: dts: qcom: sc7180-idp: add vdds supply to the DSI PHYDmitry Baryshkov1-0/+1
Add the (required) vdss-supply property to the DSI PHY node. Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: sc7280: use constants for gpucc clocks and power-domainsDmitry Baryshkov1-16/+16
To ease merging of bindings and dts files, the constants were replaced with numeric values. Change them back to defined constants. While we are at it, fix the indentation of these clocks properties to follow established guidelines. Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: msm8996: add missing DSI clock assignmentsDmitry Baryshkov1-0/+4
Add missing DSI clock assignments to properly use DSI PHY clocks as DSI byte and pixel clock parents. Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: ipq8074: add reset to SDHCIRobert Marko1-0/+1
Add reset to SDHCI controller so it can be reset to avoid timeout issues after software reset due to bootloader set configuration. Signed-off-by: Robert Marko <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: sdm845: Add CPU BWMONKrzysztof Kozlowski1-0/+37
Add device node for CPU-memory BWMON device (bandwidth monitoring) on SDM845 measuring bandwidth between CPU (gladiator_noc) and Last Level Cache (memnoc). Usage of this BWMON allows to remove fixed bandwidth votes from cpufreq (CPU nodes) thus achieve high memory throughput even with lower CPU frequencies. Co-developed-by: Thara Gopinath <[email protected]> Signed-off-by: Thara Gopinath <[email protected]> Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: ipq8074: move ARMv8 timer out of SoC nodeRobert Marko1-8/+8
The ARM timer is usually considered not part of SoC node, just like other ARM designed blocks (PMU, PSCI). This fixes dtbs_check warning: arch/arm64/boot/dts/qcom/ipq8072-ax9000.dtb: soc: timer: {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 2, 3848], [1, 3, 3848], [1, 4, 3848], [1, 1, 3848]]} should not be valid under {'type': 'object'} From schema: dtschema/schemas/simple-bus.yaml Signed-off-by: Robert Marko <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> [bjorn: Moved node after "soc" for alphabetical ordering] Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dta: qcom: sc7180: delete vdda-1p2 and vdda-0p9 from mdss_dpKuogee Hsieh1-2/+0
Both vdda-1p2-supply and vdda-0p9-supply regulators are controlled by dp combo phy. Therefore remove them from dp controller. Signed-off-by: Kuogee Hsieh <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: sdm845: Switch PSCI cpu idle states from PC to OSIAbel Vesa2-54/+213
Switch from the flat PC idle states of sdm845 to OSI hierarchical idle states. The exceptions are the cheza plaftorms, which need to remain with PC idle states. So in order allow all the other platforms to switch, while cheza platforms to remain the same, replace the PC idle states with the OSI ones in the main SDM845 dtsi, and then override the inherited OSI states with PC ones, delete inherited psci cpus nodes, domain idle states and power domain properties. Signed-off-by: Abel Vesa <[email protected]> Tested-by: Steev Klimaszewski <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: extend scm compatible stringsDavid Heidelberg4-4/+4
First device specific compatible, then general one. Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: David Heidelberg <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: add device tree for LG G7 and LG V35Anton Bambura4-0/+728
Adds initial support for the LG G7 (judyln) and LG V35 (judyp) phones. Currently supported features: - Display via simplefb (panel driver is WIP) - Keys - Micro SD card - Modem (not tested much, but initialises) - UFS (crashes during intensive workloads, may need quirks) - USB in peripheral mode Notable missing features: - Enabling WiFi causes a remoteproc crash, so it's disabled here. Needs to be debugged - ideas welcome! Signed-off-by: Anton Bambura <[email protected]> Signed-off-by: Stefan Hansson <[email protected]> Tested-by: Gregari Ivanov <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: msm8996: add xo clock source to rpmccDmitry Baryshkov1-0/+2
Add XO clock source to the RPM clock controller. Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: msm8996: add GCC's optional clock sourcesDmitry Baryshkov1-2/+16
Add missing GCC clock sources. This includes PCIe and USB PIPE and UFS symbol clocks. Signed-off-by: Dmitry Baryshkov <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: msm8996: correct #clock-cells for QMP PHY nodesDmitry Baryshkov1-2/+4
The commit 82d61e19fccb ("arm64: dts: qcom: msm8996: Move '#clock-cells' to QMP PHY child node") moved the '#clock-cells' properties to the child nodes. However it missed the fact that the property must have been set to <0> (as all pipe clocks use of_clk_hw_simple_get as the xlate function. Also the mentioned commit didn't add '#clock-cells' properties to second and third PCIe PHY nodes. Correct both these mistakes: - Set '#clock-cells' to <0>, - Add the property to pciephy_1 and pciephy_2 nodes. Fixes: 82d61e19fccb ("arm64: dts: qcom: msm8996: Move '#clock-cells' to QMP PHY child node") Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: sdm845-shift-axolotl: Enable pmi9889 LPG LEDDylan Van Assche1-0/+29
Enables the RGB notification LED on the SHIFT 6mq (sdm845-shift-axolotl) with the Qualcomm Light Pulse Generator bindings by Bjorn Andersson [1]. Patches are merged in for-next branch of linux-leds. Tested these changes on the SHIFT 6mq. [1] https://git.kernel.org/pub/scm/linux/kernel/git/pavel/linux-leds.git/commit/?h=for-next&id=a8e53db46f19f67be6a26488aafb7d10c78e33bd Signed-off-by: Dylan Van Assche <[email protected]> Reviewed-by: Alexander Martinz <[email protected]> Tested-by: Alexander Martinz <[email protected]> Tested-by: Caleb Connolly <[email protected]> Reviewed-by: Caleb Connolly <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: sm6125: Add DLL/DDR configuration on SDHCI 1/2Marijn Suijten1-0/+6
These config values have been extracted from CodeLinaro's most recent trinket/sm6125 tag: https://git.codelinaro.org/clo/la/kernel/msm-4.14/-/blob/LA.UM.9.11.r1-05600-NICOBAR.QSSI12.0/arch/arm64/boot/dts/qcom/trinket.dtsi Signed-off-by: Marijn Suijten <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: sm6125: Append -state suffix to pinctrl nodesMarijn Suijten2-6/+6
According to qcom,sm6125-pinctrl.yaml all nodes inside the tlmm must be suffixed by -state: qcom/sm6125-sony-xperia-seine-pdx201.dtb: pinctrl@500000: 'sdc2-off', 'sdc2-on' do not match any of the regexes: '-state$', 'pinctrl-[0-9]+' The label names have been updated to match, going from sdc2_state_X to sdc2_X_state. Fixes: cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125") Fixes: 82e1783890b7 ("arm64: dts: qcom: sm6125: Add support for Sony Xperia 10II") Signed-off-by: Marijn Suijten <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: sm6125: Move sdc2 pinctrl from seine-pdx201 to sm6125Marijn Suijten2-28/+30
Both the sdc2-on and sdc2-off pinctrl nodes are used by the sdhci@4784000 node in sm6125.dtsi. Surprisingly sdc2-off is defined in sm6125, yet its sdc2-on counterpart is only defined in board-specific DT for the Sony Seine PDX201 board/device resulting in an "undefined label &sdc2_state_on" error if sm6125.dtsi were included elsewhere. This sm6125 base dtsi should not rely on externally defined labels; the properties referencing it should then also be written externally. Since the sdc2-on pin configuration is board-independent just like sdc2-off, move it from seine-pdx201.dts into sm6125.dtsi. The SDCard-detect pin (gpio98) is however board-specific, and remains as an overwrite in seine-pdx201.dts for both the on and off state. As a drive-by cleanup, reorder bias- and drive-strength properties. Fixes: cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125") Fixes: 82e1783890b7 ("arm64: dts: qcom: sm6125: Add support for Sony Xperia 10II") Signed-off-by: Marijn Suijten <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: db820c: Add user LEDsBjorn Andersson1-0/+56
The db820c has 4 "user LEDs", all connected to the PMI8994. The first three are connected to the three current sinks provided by the TRILED and the fourth is connected to MPP2. By utilizing the DTEST bus the MPP is fed the control signal from the fourth LPG block, providing a consistent interface to the user. Signed-off-by: Bjorn Andersson <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Dylan Van Assche <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: pmi8994: Define MPP blockBjorn Andersson1-0/+10
The pmi8994 has 4 multi-purpose-pins, add these to the definition. Signed-off-by: Bjorn Andersson <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Dylan Van Assche <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: sdm845: Enable user LEDs on DB845cBjorn Andersson1-0/+30
The DB845c has 4 "user LEDs", the last one is already supported as it's just wired to a gpio. Now that the LPG binding is in place we can wire up the other 3 LEDs as well. Signed-off-by: Bjorn Andersson <[email protected]> Reviewed-by: Caleb Connolly <[email protected]> Reviewed-by: Dylan Van Assche <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: Add LPG to pm8916, pm8994, pmi8994 and pmi8998Bjorn Andersson4-1/+38
Add PWM/LPG nodes to the PMICs currently supported by the binding. Signed-off-by: Bjorn Andersson <[email protected]> Reviewed-by: Caleb Connolly <[email protected]> Reviewed-by: Dylan Van Assche <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: sm8350: Replace integers with rpmpd definesRobert Foss1-8/+8
Replace &rpmhpd power domain integers with their respective defines in order to improve legibility. Signed-off-by: Robert Foss <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Reviewed-by: Vinod Koul <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06arm64: dts: qcom: sm8350: Add DISPCC nodeRobert Foss1-0/+26
Add the dispcc clock-controller DT node for sm8350. Signed-off-by: Robert Foss <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06Merge branch '[email protected]' into ↵Bjorn Andersson4-2/+129
arm64-for-5.20
2022-07-06arm64: dts: qcom: sm8450: Add description of camera clock controllerVladimir Zapolskiy1-0/+16
The change adds description of Qualcomm SM8450 camera clock controller. Signed-off-by: Vladimir Zapolskiy <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06Merge branch '[email protected]' into ↵Bjorn Andersson2-0/+239
arm64-for-5.20
2022-07-06dt-bindings: clock: add QCOM SM8450 camera clock bindingsVladimir Zapolskiy2-0/+239
The change adds device tree bindings for camera clock controller found on SM8450 SoC. Reviewed-by: Rob Herring <[email protected]> Reviewed-by: Bjorn Andersson <[email protected]> Signed-off-by: Vladimir Zapolskiy <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06dt-bindings: clock: Add Qcom SM8350 DISPCC bindingsJonathan Marek2-2/+5
Add sm8350 DISPCC bindings, which are simply a symlink to the sm8250 bindings. Update the documentation with the new compatible. Signed-off-by: Jonathan Marek <[email protected]> Signed-off-by: Robert Foss <[email protected]> Reviewed-by: Rob Herring <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Vinod Koul <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-06dt-bindings: clock: Add Qcom SM8350 GPUCC bindingsRobert Foss2-0/+124
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SM8350 SoCs. Signed-off-by: Robert Foss <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-04arm64: dts: qcom: msm8996: Add interconnect supportYassine Oudjana1-0/+93
Add interconnect providers for the multiple NoCs available on the platform, and assign interconnects used by some blocks. Signed-off-by: Yassine Oudjana <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-02Merge tag 'qcom-arm64-fixes-for-5.19' into arm64-for-5.20Bjorn Andersson8-9/+20
This merges the 'qcom-arm64-fixes-for-5.19' tag into arm64-for-5.20 to handle the merge conflict related to the header file changes in sc7180-trogdor.
2022-07-02arm64: dts: qcom: sc7180-trogdor: Split out keyboard node and describe ↵Stephen Boyd11-2/+33
detachables Trogdor devices that have a detachable keyboard still have a non-detachable keyboard input device present because we include the cros-ec-keyboard.dtsi snippet in the top-level sc7180-trogdor.dtsi file that every variant board includes. We do this because the keyboard-controller node also provides some buttons like the power button and volume buttons. Unfortunately, this means we register a keyboard input device that doesn't do anything on boards with a detachable keyboard. Change the node's compatible on detachables to the newly introduced "google,cros-ec-keyb-switches" compatible to indicate that there are only switches and no keyboard to register. Similarly, move the keyboard include that defines the keyboard-controller node out of sc7180-trogdor.dtsi to boards that actually have a keyboard so that the matrix properties are not defined on boards with the switches compatible. Future boards can either use the include approach or the node definition approach to describe a keyboard with possible switches or just some switches. Cc: Benson Leung <[email protected]> Cc: Guenter Roeck <[email protected]> Cc: Douglas Anderson <[email protected]> Cc: Hsin-Yi Wang <[email protected]> Cc: "Joseph S. Barrera III" <[email protected]> Signed-off-by: Stephen Boyd <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-02arm64: dts: qcom: ipq8074: fix NAND node nameRobert Marko1-1/+1
Per schema it should be nand-controller@79b0000 instead of nand@79b0000. Fix it to match nand-controller.yaml requirements. Signed-off-by: Robert Marko <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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