diff options
| author | Dmitry Baryshkov <[email protected]> | 2022-06-20 10:19:35 +0300 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2022-07-06 21:30:09 -0500 |
| commit | edb8e38ca99f198b59c967c9e26719198cea8bf8 (patch) | |
| tree | 33fdc203a0f9209bb4bf0ed45594d1bd8bccfcf2 | |
| parent | b874fff9a7683df30e5aff16d5a85b1f8a43aa5d (diff) | |
arm64: dts: qcom: msm8996: add GCC's optional clock sources
Add missing GCC clock sources. This includes PCIe and USB PIPE and UFS
symbol clocks.
Signed-off-by: Dmitry Baryshkov <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8996.dtsi | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 469a6bc88a63..004dff3d4cbe 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -690,8 +690,22 @@ clocks = <&rpmcc RPM_SMD_BB_CLK1>, <&rpmcc RPM_SMD_LN_BB_CLK>, - <&sleep_clk>; - clock-names = "cxo", "cxo2", "sleep_clk"; + <&sleep_clk>, + <&pciephy_0>, + <&pciephy_1>, + <&pciephy_2>, + <&ssusb_phy_0>, + <0>, <0>, <0>; + clock-names = "cxo", + "cxo2", + "sleep_clk", + "pcie_0_pipe_clk_src", + "pcie_1_pipe_clk_src", + "pcie_2_pipe_clk_src", + "usb3_phy_pipe_clk_src", + "ufs_rx_symbol_0_clk_src", + "ufs_rx_symbol_1_clk_src", + "ufs_tx_symbol_0_clk_src"; }; bimc: interconnect@408000 { |