diff options
| author | Robert Marko <[email protected]> | 2022-07-04 16:35:54 +0200 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2022-07-06 21:30:13 -0500 |
| commit | 730d55d861c63647df3cc9f77904a01c6719201b (patch) | |
| tree | 3789d0bd0f26b79879a025a47453938696f3cefb | |
| parent | d3ef125cf844ab2f6365d8645d7468cec709170a (diff) | |
arm64: dts: qcom: ipq8074: add reset to SDHCI
Add reset to SDHCI controller so it can be reset to avoid timeout issues
after software reset due to bootloader set configuration.
Signed-off-by: Robert Marko <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
| -rw-r--r-- | arch/arm64/boot/dts/qcom/ipq8074.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index 3779563527fa..c4f9bec9a39b 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -389,6 +389,7 @@ <&gcc GCC_SDCC1_APPS_CLK>, <&xo>; clock-names = "iface", "core", "xo"; + resets = <&gcc GCC_SDCC1_BCR>; max-frequency = <384000000>; mmc-ddr-1_8v; mmc-hs200-1_8v; |