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v1: Add nbif v6_3_1 register offset and shift masks
header files. (Hawking)
v2: Update nbif v6_3_1 register offset and shift masks
header files to RE2. (Likun)
v3: Update nbif v6_3_1 register offset and shift masks
header files to RE2.5. (Likun)
v4: Update nbif v6_3_1 register offset and shift masks
header files to RE3. (Likun)
v5: Updates (Alex)
Signed-off-by: Hawking Zhang <[email protected]>
Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Reviewed-by: Likun Gao <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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we need to move virt detection much earlier because:
1) HW team confirms us that RCC_IOV_FUNC_IDENTIFIER will always
be at DE5 (dw) mmio offset from vega10, this way there is no
need to implement detect_hw_virt() routine in each nbio/chip file.
for VI SRIOV chip (tonga & fiji), the BIF_IOV_FUNC_IDENTIFIER is at
0x1503
2) we need to acknowledged we are SRIOV VF before we do IP discovery because
the IP discovery content will be updated by host everytime after it recieved
a new coming "REQ_GPU_INIT_DATA" request from guest (there will be patches
for this new handshake soon).
Signed-off-by: Monk Liu <[email protected]>
Reviewed-by: Emily Deng <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Cleanup asic_reg/vega10/NBIF folder.
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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