| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2024-08-13 | drm/amdgpu/uvd4: fix mask and shift definitions | Remington Brasga | 1 | -2/+0 | |
| A few define's are listed twice with different, incorrect values. This fix sets them appropriately. Signed-off-by: Remington Brasga <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-07-23 | drm/amdgpu: Fix atomics on GFX12 | David Belanger | 2 | -0/+56 | |
| If PCIe supports atomics, configure register to prevent DF from breaking atomics in separate load/store operations. Signed-off-by: David Belanger <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-06-27 | drm/amd: Add some missing register definitions | Aurabindo Pillai | 1 | -0/+18 | |
| Add some register offsets that are required for Display DCC on DCN401 Fixes: 2d072b445622 ("drm/amd: Add reg definitions for DCN401 DCC") Reported-by: Tom St Denis <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-06-27 | drm/amd: Add reg definitions for DCN401 DCC | Aurabindo Pillai | 1 | -0/+110 | |
| [WHAT] Add the necessary register definitions to enable DCC on DCN4x Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-06-05 | drm/amdgpu: update gc_12_0_0 headers | Alex Deucher | 2 | -0/+106 | |
| Add some additional registers. Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-05-29 | drm/amd/display: Add missing registers for DCN401 | Rodrigo Siqueira | 1 | -1/+50 | |
| Add some additional registers. Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-05-23 | drm/amdgpu: Add missing offsets in gc_11_0_0_offset.h | Sunil Khatri | 1 | -0/+10 | |
| IB1 registers: regCP_IB1_CMD_BUFSZ regCP_IB1_BASE_LO regCP_IB1_BASE_HI regCP_IB1_BUFSZ regCP_MES_DEBUG_INTERRUPT_INSTR_PNTR Above registers are part of the asic but not of the offset file for gc_11_0_0_offset.h and hence adding them. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Sunil Khatri <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-05-20 | drm/amd/amdgpu: add thm 14.0.2 header file | Kenneth Feng | 2 | -0/+1168 | |
| add thm 14.0.2 header file v2: add license, update to latest changes (Alex) Signed-off-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Likun Gao <[email protected]> | |||||
| 2024-04-30 | drm/amdgpu: Add mmhub v4_1_0 ip headers (v4) | Hawking Zhang | 2 | -0/+8284 | |
| v1: Add mmhub v4_1_0 register offset and shift masks header files. (Hawking) v2: Update mmhub v4_1_0 register offset and shift masks header files to RE2. (Likun) v3: Update mmhub v4_1_0 register offset and shift masks header files to RE2.5 (Likun) v4: Clean up mmhub v4_1_0 ip headers (Alex) Signed-off-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-04-30 | drm/amdgpu: Add gc v12_0_0 ip headers (v4) | Hawking Zhang | 2 | -0/+51505 | |
| v1: Add gc v12_0_0 register offset and shift masks header files. (Hawking) v2: Update gc v12_0_0 register offset and shift masks header files to LSD version. (Likun) v3: Update gc v12_0_0 register offset and shift masks header files to RE3 version. (Likun) v4: Updates (Alex) v5: updates (Alex) Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Likun Gao <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-04-26 | drm/amd: Add DCN401 related register definitions | Aurabindo Pillai | 9 | -0/+162669 | |
| Update register headers. Signed-off-by: Aurabindo Pillai <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-04-26 | drm/amd/display: Add some missing HDMI registers for DCN3x | Rodrigo Siqueira | 4 | -0/+23 | |
| This commit add some missing HDMI control registers to DCN3x. Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-04-26 | drm/amd/display: Add missing debug registers for DCN2/3/3.1 | Rodrigo Siqueira | 2 | -1/+27 | |
| This commit add some missing debug registers for DPCS and RDPC debug. Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-04-26 | drm/amdgpu: add support of gfx10 register dump | Sunil Khatri | 1 | -0/+12 | |
| Adding gfx10 gc registers to be used for register dump via devcoredump during a gpu reset. Signed-off-by: Sunil Khatri <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-04-18 | drm/amdgpu: add IH_RING1_CFG headers for IH v6.0 | Sunil Khatri | 2 | -0/+14 | |
| Add offsets, mask and shift macros for IH v6.0 which are needed to configure ring1 client irq redirection. Signed-off-by: Sunil Khatri <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-04-09 | drm/amd/display: Add missing registers | Rodrigo Siqueira | 8 | -1/+149 | |
| Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-04-09 | drm/amd/display: Add some missing debug registers | Rodrigo Siqueira | 7 | -0/+81 | |
| Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-03-20 | drm/amdgpu: Add smuio v14_0_2 ip headers (v4) | Hawking Zhang | 2 | -0/+1617 | |
| v1: Add smuio v14_0_2 register offset and shift masks header files. (Hawking) v2: Update smuio v14_0_2 register offset and shift masks header files to RE2. (Likun) v3: Update smuio v14_0_2 register offset and shift masks header files to RE2.5. (Likun) v4: Clean up smuio v14_0_2 ip headers (Alex) Signed-off-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Likun Gao <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-03-20 | drm/amd/display: Add missing registers and offset | Rodrigo Siqueira | 2 | -1/+52 | |
| [Why & How] Registers and offset are missing. Add it back Acked-by: Wayne Lin <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-03-20 | drm/amdgpu: add new bit definitions for GC 9.0 PROTECTION_FAULT_STATUS | Tao Zhou | 1 | -0/+4 | |
| Add UCE and FED bit definitions. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-03-07 | drm/amdgpu: Add pcie v6_1_0 ip headers (v5) | Hawking Zhang | 2 | -0/+4880 | |
| v1: Add pcie v6_1_0 register offset and shift masks header files. (Hawking) v2: Update pcie v6_1_0 register offset and shift masks header files to RE2. (Likun) v3: Update pcie v6_1_0 register offset and shift masks header files to RE2.5. (Likun) v4: Update pcie v6_1_0 register offset and shift masks header files to RE3. (Likun) v5: Updates (Alex) Signed-off-by: Hawking Zhang <[email protected]> Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Likun Gao <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-03-07 | drm/amdgpu: Add nbif v6_3_1 ip headers (v5) | Hawking Zhang | 2 | -0/+44093 | |
| v1: Add nbif v6_3_1 register offset and shift masks header files. (Hawking) v2: Update nbif v6_3_1 register offset and shift masks header files to RE2. (Likun) v3: Update nbif v6_3_1 register offset and shift masks header files to RE2.5. (Likun) v4: Update nbif v6_3_1 register offset and shift masks header files to RE3. (Likun) v5: Updates (Alex) Signed-off-by: Hawking Zhang <[email protected]> Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Likun Gao <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-03-04 | drm/amd: add register headers for DCN351 | Hamza Mahfooz | 2 | -0/+68723 | |
| Add register headers for DCN 3.5.1. Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-02-22 | Revert "drm/amdgpu: Add pci usage to nbio v7.9" | Asad Kamal | 1 | -8/+0 | |
| Remove implementation to get pcie usage for nbio v7.9 as pcie usage is handled by fw This reverts commit 59070fd9ccea58c3363d39f69c25fa98c71eb02f. Signed-off-by: Asad Kamal <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-02-16 | drm/amdgpu/nbio: Add NBIO 7.11.1 Support | Yifan Zhang | 1 | -0/+2 | |
| Fix up doorbell setup and clockgating. v2: squash in fixes (Alex) Signed-off-by: Yifan Zhang <[email protected]> Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Veerabadhran Gopalakrishnan <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-02-14 | drm/amdgpu: Add mp v14_0_2 ip headers (v5) | Hawking Zhang | 2 | -0/+1160 | |
| v1: Add mp v14_0_2 register offset and shift masks header files. (Hawking) v2: Update mp v14_0_2 register offset and shift masks header files to RE2. (Likun) v3: Update mp v14_0_2 register offset and shift masks header files to RE2.5. (Likun) v4: Update mp v14_0_2 register offset and shift masks header files to RE3. (Likun) v5: Updates (Alex) Signed-off-by: Hawking Zhang <[email protected]> Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Likun Gao <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-02-12 | drm/amdgpu: Add vcn v5_0_0 ip headers (v5) | Hawking Zhang | 2 | -0/+9299 | |
| v1: Add vcn v5_0_0 register offset and shift masks header files. (Hawking) v2: Update vcn v5_0_0 register offset and shift masks header files to RE2. (Likun) v3: Update vcn v5_0_0 register offset and shift masks header files to RE2.5. (Likun) v4: Update vcn v5_0_0 register offset and shift masks header files to RE3. (Likun) v5: Clean up vcn v5_0_0 ip headers. (Alex) Signed-off-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Likun Gao <[email protected] Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-02-12 | drm/amdgpu: Add hdp v7_0_0 ip headers (v3) | Hawking Zhang | 2 | -0/+954 | |
| v1: Add hdp v7_0_0 register offset and shift masks header files (Hawking) v2: Update hdp v7_0_0 register offset and shift masks header files for RE2.5 (Likun) v3: Clean up hdp v7_0_0 ip headers (Alex) Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Likun Gao <[email protected]> Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-02-12 | drm/amdgpu: Add osssys v7_0_0 ip headers (v4) | Hawking Zhang | 2 | -0/+1308 | |
| v1: Add osssys v7_0_0 register offset and shift masks header files. (Hawking) v2: Update osssys v7_0_0 register offset and shift masks header files to RE2. (Likun) v3: Update osssys v7_0_0 register offset and shift masks header files to RE2.5. (Likun) v4: Clean up osssys v7_0_0 ip headers (Alex) Signed-off-by: Hawking Zhang <[email protected]> Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Likun Gao <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-02-12 | drm/amdgpu: Add lsdma v7_0_0 ip headers (v3) | Hawking Zhang | 2 | -0/+1799 | |
| v1: Add lsdma v7_0_0 register offset and shift masks header files (Hawking) v2: Update lsdma v7_0_0 register offset and shift masks header files for RE2.5 (Likun) v3: Clean up lsdma v7_0_0 ip headers (Alex) Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Likun Gao <[email protected]> Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-02-12 | drm/amdgpu: Add athub v4_1_0 ip headers (v5) | Hawking Zhang | 2 | -0/+1635 | |
| v1: Add athub v4_1_0 register offset and shift masks header files. (Hawking) v2: Update athub v4_1_0 register offset and shift masks header files to RE2. (Likun) v3: Update athub v4_1_0 register offset and shift masks header files to RE2.5 (Likun) v4: Update athub v4_1_0 register offset and shift masks header files to RE3. (Likun) v5: Clean up athub v4_1_0 ip headers. (Alex) Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Likun Gao <[email protected]> Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-01-29 | drm/amd/include: Add missing registers/mask for DCN316 and 350 | Rodrigo Siqueira | 4 | -0/+103 | |
| Cc: Jun Lei <[email protected]> Cc: Aurabindo Pillai <[email protected]> Cc: Hamza Mahfooz <[email protected]> Cc: Harry Wentland <[email protected]> Cc: Alex Deucher <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-01-15 | drm/amdgpu: update headers for nbio v7.11 | Yifan Zhang | 1 | -4/+4 | |
| This patch is to update headers for nbio v7.11. Signed-off-by: Yifan Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Tim Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-12-06 | drm/amd/amdgpu: Add SMUIO headers for 10.0.2 | Tom St Denis | 2 | -0/+286 | |
| These were requested by a UMR user for debugging purposes. Signed-off-by: Tom St Denis <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-11-29 | drm/amdgpu: add init_registers for nbio v7.11 | Li Ma | 2 | -0/+31 | |
| enable init_registers callback func for nbio v7.11. Signed-off-by: Li Ma <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-11-29 | drm/amdgpu: Force order between a read and write to the same address | Alex Sierra | 1 | -0/+2 | |
| Setting register to force ordering to prevent read/write or write/read hazards for un-cached modes. Signed-off-by: Alex Sierra <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-11-17 | drm/amd/display: Enable DCN clock gating for DCN35 | Daniel Miess | 1 | -0/+8 | |
| [WHY & HOW] Enable DCN clock gating for DCN35. Disable DTBCLK gate before link training and re-enable afterwards Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Daniel Miess <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-11-03 | drm/amdgpu: Add C2PMSG_109/126 reg field shift/masks | Hawking Zhang | 1 | -0/+28 | |
| Add MP0_C2PMSG_109/126 register field shift/masks that are used to identify boot status by driver. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Reviewed-by: Yang Wang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-10-20 | drm/amdgpu: fix missing stuff in NBIO v7.11 | Li Ma | 2 | -1/+18 | |
| add get_clockgating_state, update_medium_grain_light_sleep and update_medium_grain_clock_gating in nbio_v7_11_funcs v1: add missing funcs in nbio_v7_11.c v2: modify the if condition and add spport for nbio v7.11 clockgating. Signed-off-by: Li Ma <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-10-19 | drm/amdgpu: update to the latest GC 11.5 headers | Alex Deucher | 1 | -0/+48 | |
| Add some additional bitfields. Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-10-13 | drm/amdgpu: correct NBIO v7.11 programing | Lang Yu | 1 | -3/+6 | |
| Use v7.7 before, switch to v7.11 now. Fix incorrect programing. Signed-off-by: Lang Yu <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-09-20 | drm/amd/pm: add smu_13_0_6 mca dump support | Yang Wang | 1 | -0/+28 | |
| v1: implement smu_v13_0_6 mca bank interface. v2: - remove unnecessary lock - move MCMP1_* macros to mp_13_0_6_sh_mask.h file Signed-off-by: Yang Wang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-09-06 | drm/amd: Add umc v12_0_0 ip headers | Candice Li | 2 | -0/+128 | |
| Add umc v12_0_0 ip headers. Signed-off-by: Candice Li <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-08-31 | drm/amdgpu: add UMSCH 4.0 register headers | Lang Yu | 2 | -0/+1304 | |
| Add headers for UMSCH 4.0. v2: updates (Alex) Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Reviewed-by: Veerabadhran Gopalakrishnan <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-08-31 | drm/amdgpu: add vcn 4_0_5 header files | Saleemkhan Jamadar | 2 | -0/+10411 | |
| Add VCN 4.0.5 registers v2 - Add license header (Alexander Deucher) v3 - updates (Alex) Signed-off-by: Saleemkhan Jamadar <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-08-30 | drm/amdgpu: add VPE 6.1.0 header files | Lang Yu | 2 | -0/+5946 | |
| Add initial headers. (Ray) Update to align with hardware changes. (Lang) Updates (Alex) Signed-off-by: Huang Rui <[email protected]> Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-08-30 | drm/amd/display: Add dcn35 register header files | Qingqing Zhuo | 2 | -0/+68667 | |
| [Why & How] Add register headers for DCN35. Signed-off-by: Qingqing Zhuo <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-08-30 | drm/amdgpu: add header files for MP 14.0.0 | Li Ma | 2 | -0/+893 | |
| This patch will add header files for MP 14.0.0. v2: updates (Alex) Signed-off-by: Li Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-08-30 | drm/amdgpu: add mmhub 3.3.0 headers | Lang Yu | 2 | -0/+8117 | |
| Add new headers. v2: updates (Alex) Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-08-30 | drm/amdgpu: add gc headers for gc 11.5.0 | Lang Yu | 2 | -0/+46531 | |
| Add gc_11_5_0 headers. v2: updates (Alex) Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||