| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2024-04-30 | drm/amdgpu: Add mmhub v4_1_0 ip headers (v4) | Hawking Zhang | 2 | -0/+8284 | |
| v1: Add mmhub v4_1_0 register offset and shift masks header files. (Hawking) v2: Update mmhub v4_1_0 register offset and shift masks header files to RE2. (Likun) v3: Update mmhub v4_1_0 register offset and shift masks header files to RE2.5 (Likun) v4: Clean up mmhub v4_1_0 ip headers (Alex) Signed-off-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-08-30 | drm/amdgpu: add mmhub 3.3.0 headers | Lang Yu | 2 | -0/+8117 | |
| Add new headers. v2: updates (Alex) Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-06-09 | drm/amdgpu: Add mmhub v1_8_0 ras err status registers | Hawking Zhang | 2 | -8/+373 | |
| add new ras error status registers introduced in mmhub v1_8_0 to log mmea and mm_cane ras err, including MMEAx_UE|CE_ERR_STATUS_LO|HI MM_CANE_UE|CE_ERR_STATUS_LO|HI Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2023-03-31 | drm/amdgpu: add mmhub v1_8_0 ip headers | Hawking Zhang | 2 | -0/+25629 | |
| Add mmhub v1_8_0 register offset and shift masks header files v2: update headers (Alex) Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2022-09-29 | drm/amd/amdgpu: Add missing XGMI hive registers for mmhub 9.4.1 | Tom St Denis | 2 | -0/+12 | |
| These are used by umr to sort the hive nodes since the kernel initializes the nodes in order of bus enumeration not XGMI hive enumeration. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2022-06-03 | drm/amdgpu: add mmhub v3_0_1 headers | Huang Rui | 2 | -0/+9252 | |
| Add mmhub v3_0_1 headers, because there are many differeces with v3_0_0. v2: squash in updates (Alex) Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Tim Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2022-05-05 | drm/amdgpu: add mmhub v3_0_2 ip headers | Hawking Zhang | 2 | -0/+8653 | |
| Add mmhub v3_0_2 register offset and shift masks v2: update to latest headers Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Likun Gao <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2022-05-04 | drm/amdgpu: add mmhub v3_0_0 ip headers v6 | Hawking Zhang | 2 | -0/+9007 | |
| Add mmhub v3_0_0 register offset and shift masks header files (Hawking) Signed-off-by: Hawking Zhang <[email protected]> Signed-off-by: Likun Gao <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Likun Gao <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2021-03-10 | drm/amdgpu: add mmhub v1_7 ip headers (v3) | Hawking Zhang | 2 | -0/+37303 | |
| v1: Add mmhub v1_7 register offset and shift masks in header files (Hawking) v2: Clean up mmhub v1_7 registers (Alex) v3: Update registers (Alex) Signed-off-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2020-10-05 | drm/amdgpu: add vangogh asic header files (v2) | Huang Rui | 3 | -0/+14023 | |
| This patch is to add vangogh asic header files. v2: squash in updates Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2020-01-22 | drm/amdgpu: update mmhub 9.4.1 header files for Acrturus | Dennis Li | 1 | -0/+128 | |
| Add mask & shift definition of MAM_D(0~3)MEM for all mmhub ranges. Signed-off-by: Dennis Li <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2019-11-22 | drm/amdgpu: refine query function of mmhub EDC counter in vg20 | Dennis Li | 4 | -310/+138 | |
| Add codes to print the detail EDC info for the subblock of mmhub v2: Move the EDC_CNT registers' defintion from mmhub_9_4 header files to mmhub_1_0 ones. Add mmhub_v1_0_ prefix for the local static variable and function. v3: squash in DC fix Signed-off-by: Dennis Li <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2019-08-15 | drm/amdgpu: implement querying ras error count for mmhub | Tao Zhou | 2 | -0/+243 | |
| get mmhub ea ras error count by accessing EDC_CNT register Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2019-07-18 | drm/amdgpu: add mmhub 9.4.1 header files for Acrturus | Le Ma | 3 | -0/+56570 | |
| mmhub is the GPU memory hub used by SDMA and VCN. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2019-06-20 | drm/amdgpu: add MMHUB 2.0 register headers | Hawking Zhang | 3 | -0/+10293 | |
| Signed-off-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2018-12-05 | drm/amd/include: Add mmhub 9.4 reg offsets and shift-mask | Leo Li | 2 | -0/+67 | |
| In particular, we need the mmMC_VM_XGMI_LFB_CNTL register, for determining if xGMI is enabled on VG20. This will be used by DC to determine the correct spread spectrum adjustment for display and audio clocks. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2018-03-21 | drm/amd/include: Add ip header files for vega12. | Feifei Xu | 2 | -0/+12256 | |
| Add ip header files for IPs with a delta for vg12: GC, MMHUB, OSS Acked-by: Christian König <[email protected]> Signed-off-by: Feifei Xu <[email protected]> Reviewed-By: Ken Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-12-06 | drm/amd/include:cleanup raven1 mmhub header files. | Feifei Xu | 2 | -0/+11789 | |
| Cleanup asic_reg/raven1/MMHUB folder.Remove unused mmhub_9_1_default.h Signed-off-by: Feifei Xu <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-12-06 | drm/amd/include:cleanup vega10 mmhub header files. | Feifei Xu | 3 | -0/+13105 | |
| Cleanup asic_reg/vega10/MMHUB folder. Signed-off-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||