| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2024-08-27 | drm/amd/display: Resolve Coverity Issues | Daniel Sa | 1 | -1/+0 | |
| [WHY] Remove coverity issues that were originally ignored. [HOW] Ran coverity locally on driver, used output report to find existing coverity issues, resolved them Reviewed-by: Nicholas Choi <[email protected]> Signed-off-by: Daniel Sa <[email protected]> Signed-off-by: Zaeem Mohamed <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-08-20 | drm/amd/display: DML2.1 Reintegration for Various Fixes | Austin Zheng | 2 | -1/+2 | |
| [Why and How] DML2.1 reintegration for several fixes and updates to the DML code. Reviewed-by: Dillon Varone <[email protected]> Signed-off-by: Austin Zheng <[email protected]> Signed-off-by: Roman Li <roman.li@amd Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-08-06 | drm/amd/display: Add DML2.1 option to disable DRR clamped P-State Strategies | Dillon Varone | 1 | -0/+1 | |
| [WHY & HOW] When DRR is active with variable refresh rate, add the ability to block DRR clamped P-State strategies (such as SubVP). Reviewed-by: Alvin Lee <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-07-23 | drm/amd/display: Various DML2 fixes for FAMS2 | Dillon Varone | 1 | -1/+0 | |
| The disable fams2 operation was reworked, but some of the old code remained. This commit removes the disable_fams2_drr from the dml2_stream_parameters. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-07-23 | drm/amd/display: rename dcn401_soc to dcn4_variant_a_soc | Aurabindo Pillai | 1 | -1/+1 | |
| To distinguish between different soc with same DCN IP, use variants starting with alphabets Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-07-23 | drm/amd/display: rename dcn3/dcn4 to more sound terms | Aurabindo Pillai | 4 | -18/+18 | |
| Use more accurate names to refer to the asic architecture. dcn3 in DML actually refers to DCN32 and DCN321, so rename it to dcn32x dcn4 refers to any DCN4x soc., and hence rename dcn4 to dcn4x Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-07-23 | drm/amd/display: DML2.1 resynchronization | Chaitanya Dhere | 7 | -8/+18 | |
| July update for DML2.1 library from hardware team targeting DCN401 Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Jerry Zuo <[email protected]> Signed-off-by: Chaitanya Dhere <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-05-29 | drm/amd/display: Update DML2.1 generated code | Rodrigo Siqueira | 4 | -11/+34 | |
| Most of the DML code is generated, and it is necessary to update some parts of it from time to time. This commit brings the latest generated code for DML 2.1. Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-04-26 | drm/amd/display: Add new DCN401 sources | Aurabindo Pillai | 9 | -0/+2422 | |
| Add initial support for DCN 4.0.1. Signed-off-by: Aurabindo Pillai <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||