| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2024-06-05 | drm/amd/display: Keep VBios pixel rate div setting until next mode set | yi-lchen | 1 | -5/+7 | |
| [why] Vbios & Driver have difference pixel rate div policy. When enabling fast boot & performing blank & unblank w/o timing setting, pixel clock & pixel rate dividor are not match. It would cause too high pixel reate and eDP would be black screen. [How] We would keep pixel rate div setting by Vbios until next timing setting. Reviewed-by: Jun Lei <[email protected]> Acked-by: Zaeem Mohamed <[email protected]> Signed-off-by: yi-lchen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2024-05-02 | drm/amd/display: Refactor DCCG into component folder | Revalla Hari Krishna | 2 | -0/+498 | |
| [why] cleaning up the code refactor requires dccg to be in its own component. [how] move all files under newly created dccg folder and fixing the makefiles. Reviewed-by: Martin Leung <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Revalla Hari Krishna <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||