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git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux into arm/dt
Device tree updates towards 5.10-rc1 for TI K3 platform.
* tag 'ti-k3-dt-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux: (23 commits)
arm64: dts: ti: k3-j721e-common-proc-board: Configure the PCIe instances
arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes
arm64: dts: ti: k3-*: Fix up node_name_chars_strict warnings
arm64: dts: ti: k3-am65-wakeup: Use generic temperature-sensor for node name
arm64: dts: ti: k3-am65-base-board Use generic camera for node name instead of ov5640
arm64: dts: ti: k3-*: Use generic pinctrl for node names
arm64: dts: ti: k3-am65*: Use generic clock for syscon clock names
arm64: dts: ti: k3-am65*: Use generic gpio for node names
arm64: dts: ti: k3-am65-main: Use lower case hexadecimal
arm64: dts: ti: k3-j721e: Use lower case hexadecimal
arm64: dts: ti: k3-am65: restrict PCIe to Gen2 speed
arm64: dts: ti: k3-j721e-som-p0: Reserve memory for IPC between RTOS cores
arm64: dts: ti: k3-j721e-som-p0: Add DDR carveout memory nodes for C71x DSP
arm64: dts: ti: k3-j721e-som-p0: Add mailboxes to C71x DSP
arm64: dts: ti: k3-j721e-main: Add C71x DSP node
arm64: dts: ti: k3-j721e-som-p0: Add DDR carveout memory nodes for C66 DSPs
arm64: dts: ti: k3-j721e-som-p0: Add mailboxes to C66x DSPs
arm64: dts: ti: k3-j721e-main: Add C66x DSP nodes
arm64: dts: ti: k3-j721e-som-p0: Move mailbox nodes from board dts file
arm64: dts: ti: k3-j721e-main: Add crypto accelerator node
...
Link: https://lore.kernel.org/r/20200922134722.2y5kqxu4lghbwp5u@akan
Signed-off-by: Olof Johansson <[email protected]>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.10, part two
Minor cleanups: removal of undocumented I2S properties, alignment of OPP
table node name with dtschema.
* tag 'samsung-dt64-5.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Align OPP table name with dt-schema
arm64: dts: exynos: Remove undocumented i2s properties in Exynos5433
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Olof Johansson <[email protected]>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.10, part two
1. Further cleanup of DTS with dtschema: s5pv210, s3c6410 and s3c24xx.
This fixes many minor dtschema violations, adds few missing
functionalities (like clock for RTC) and improves the code
maintainability in few places. Except the RTC clock, this should not
have visible impact.
2. Fix few remaining Exynos dtschema violations.
* tag 'samsung-dt-5.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (36 commits)
ARM: dts: s5pv210: replace deprecated "gpios" i2c-gpio property in Goni
ARM: dts: s5pv210: replace deprecated "gpios" i2c-gpio property in Aquila
ARM: dts: s5pv210: move fixed regulators under root node in Goni
ARM: dts: s5pv210: move fixed regulators under root node in Aquila
ARM: dts: exynos: Align OPP table name with dt-schema
ARM: dts: exynos: move assigned-clock* properties to i2s0 node in Odroid XU4
ARM: dts: exynos: add input clock to CMU in Exynos4412 Odroid
ARM: dts: exynos: add input clock to CMU in Exynos3250
ARM: dts: s3c24xx: move fixed clocks under root node in SMDK2416
ARM: dts: s3c24xx: add address to CPU node
ARM: dts: s3c24xx: align PWM/timer node name with dtschema
ARM: dts: s3c24xx: override nodes by label
ARM: dts: s3c24xx: fix number of PWM cells
ARM: dts: s3c6410: remove additional CPU compatible
ARM: dts: s3c6410: align node SROM bus node name with dtschema in SMDK6410
ARM: dts: s3c6410: align node SROM bus node name with dtschema in Mini6410
ARM: dts: s3c6410: move fixed clocks under root node in SMDK6410
ARM: dts: s3c6410: move fixed clocks under root node in Mini6410
ARM: dts: s5pv210: correct ethernet unit address in SMDKV210
ARM: dts: s5pv210: align SPI GPIO node name with dtschema in Aries
...
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Changes for v5.10-rc1
This set of changes fixes some minor issues in existing device trees and
adds ID EEPROMs on the Jetson Xavier NX. All ID EEPROMs are now labelled
to allow them to be detected by software.
It also adds support for the Tegra234 VDK board, which is a pre-silicon
platform for the upcoming Orin SoC.
* tag 'tegra-for-5.10-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Initial Tegra234 VDK support
arm64: tegra: Populate EEPROMs for Jetson Xavier NX
arm64: tegra: Add label properties for EEPROMs
arm64: tegra: Add DT binding for AHUB components
arm64: tegra: Enable ACONNECT, ADMA and AGIC on Jetson Nano
arm64: tegra: Properly size register regions for GPU on Tegra194
arm64: tegra: Use valid PWM period for VDD_GPU on Tegra210
arm64: tegra: Describe display controller outputs for Tegra210
arm64: tegra: Disable SD card write-protection on Jetson Nano
arm64: tegra: Add VBUS supply for micro USB port on Jetson Nano
arm64: tegra: Wire up pinctrl states for all DPAUX controllers
arm64: tegra: Add ID EEPROMs on Jetson AGX Xavier
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v5.10-rc1
This set of changes adds compatible strings for Tegra234 to existing
device tree bindings.
* tag 'tegra-for-5.10-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: power: supply: Add device-tree binding for Summit SMB3xx
dt-bindings: tegra: pmc: Add Tegra234 support
dt-bindings: fuse: tegra: Add Tegra234 support
dt-bindings: tegra: Add Tegra234 VDK compatible
dt-bindings: misc: tegra186-misc: Add Tegra234 support
dt-bindings: misc: tegra186-misc: Add missing compatible string
dt-bindings: misc: tegra-apbmisc: Add missing compatible strings
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT binding updates for v5.10
- Document core support for the R-Car V3U (R8A779A0) SoC and the
Renesas Falcon CPU and BreakOut boards.
* tag 'renesas-dt-bindings-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: arm: renesas: Document Renesas Falcon boards
dt-bindings: reset: renesas,rst: Document r8a779a0 reset module
dt-bindings: power: renesas,rcar-sysc: Document r8a779a0 SYSC bindings
dt-bindings: arm: renesas: Document R-Car V3U SoC DT bindings
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.10 (take two)
- PCIe endpoint support for the RZ/G2H SoC,
- SATA support for the HopeRun HiHope RZ/G2H board,
- Increase support (CAN, LED, SPI NOR, VIN, VSP) for the RZ/G1H SoC on
the iWave Qseven board (G21D), and its camera add-on board,
- Initial support for the R-Car V3U SoC on the Falcon CPU and BreakOut
boards,
- HDMI display and sound support for the R-Car M3-W+ SoC on the
Salvator-XS board,
- Digital Radio Interface (DRIF) support for the R-Car E3 SoC,
- Minor fixes and cleanups.
* tag 'renesas-arm-dt-for-v5.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (24 commits)
arm64: dts: renesas: r8a774c0: Fix MSIOF1 DMA channels
arm64: dts: renesas: r8a77990: Fix MSIOF1 DMA channels
arm64: dts: renesas: r8a77990: Add DRIF support
ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Add can0 support to camera DB
ARM: dts: r8a7742: Add VSP support
arm64: dts: renesas: Drop superfluous pin configuration containers
arm64: dts: renesas: r8a77961: salvator-xs: Add HDMI Sound support
arm64: dts: renesas: r8a77961: salvator-xs: Add HDMI Display support
arm64: dts: renesas: r8a77961: Add HDMI device nodes
arm64: dts: renesas: r8a77961: Add DU device nodes
arm64: dts: renesas: r8a77961: Add VSP device nodes
arm64: dts: renesas: r8a77961: Add FCP device nodes
arm64: dts: renesas: Fix pin controller node names
ARM: dts: renesas: Fix pin controller node names
arm64: dts: renesas: Add Renesas Falcon boards support
arm64: dts: renesas: Add Renesas R8A779A0 SoC support
ARM: dts: r8a7742-iwg21d-q7: Enable SD2 LED indication
ARM: dts: r8a7742-iwg21d-q7: Add can1 support to carrier board
ARM: dts: r8a7742-iwg21d-q7: Add SPI NOR support
ARM: dts: r8a7742: Add VIN DT nodes
...
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Olof Johansson <[email protected]>
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The Synopsys DesignWare APB GPIO controller port must have gpio-cells
property, as pointed by dtschema:
arch/arm64/boot/dts/apm/apm-mustang.dt.yaml: gpio@1c024000: gpio-controller@0: '#gpio-cells' is a required property
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Olof Johansson <[email protected]>
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The Synopsys DesignWare APB GPIO controller driver does not parse
reg-io-width and dtschema does not allow it so drop it to fix dtschema
warnings like:
arch/arm64/boot/dts/apm/apm-mustang.dt.yaml: gpio@1c024000:
'reg-io-width' does not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', 'pinctrl-[0-9]+'
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Olof Johansson <[email protected]>
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The Synopsys DesignWare APB GPIO controller driver does not parse
reg-io-width and dtschema does not allow it so drop it to fix dtschema
warnings like:
arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dt.yaml: gpio@20000:
'reg-io-width' does not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', 'pinctrl-[0-9]+'
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Acked-by: Jamie Iles <[email protected]>
Signed-off-by: Olof Johansson <[email protected]>
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Add ARCH_PICOXCELL entries to Makefil so the DTBs get built with
`make dtbs`.
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt
AT91 DT for 5.10
- New board: GARDENA smart Gateway (Art. 19000)
- dtbs_check warnings fixes
* tag 'at91-dt-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: sama5d2: add missing flexcom spi node properties
ARM: dts: at91: add unit-address to memory node
ARM: dts: at91: move mmc pinctrl-names property to board dts
ARM: dts: at91: fix sram nodes
ARM: dts: at91: fix cpu node
ARM: at91: Add GARDENA smart Gateway (Art. 19000) support
dt-bindings: arm: at91: Add GARDENA smart Gateway (Art. 19000) board
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt
SoCFPGA DTS updates for v5.10
- Increase shared-dma-pool size to 32MB
- Add ptp_ref clock properties to the ethernet nodes on Stratix10 and Agilex
* tag 'socfpga_dts_update_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: stratix10/agilex: add the ptp_ref clock
arm64: dts: agilex: increase shared memory size to 32Mb
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt
Ux500 DTS updates for the v5.10 kernel cycle:
- Add the s6e63m0 display to the Golden device
- Add the KTD253 backlight to the Skomer device
- Update the LP5521 LED DTS entries for binding changes
* tag 'ux500-dts-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: dts: ste-href: Add reg property to the LP5521 channel nodes
ARM: dts: ux500-skomer: Add KTD253 backlight
ARM: dts: ux500-golden: Add S6E63M0 DSI display
Link: https://lore.kernel.org/r/CACRpkda=-cgFjN7K2vBU5x4uSYrohrZSbjqMnSFb3Qe2Az1W5g@mail.gmail.com
Signed-off-by: Olof Johansson <[email protected]>
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https://github.com/microchip-ung/linux-upstream into arm/dt
Sparx5 DT updates for Linux 5.10
- Add public repo to MAINTAINERS
- Add SPI controller and devices
- Add eMMC controller and devices
- Add temperature sensor
* tag 'sparx5-dt-5.10' of https://github.com/microchip-ung/linux-upstream:
arm64: dts: sparx5: Add spi-nand devices
arm64: dts: sparx5: Add spi-nor support
arm64: dts: sparx5: Add SPI controller and associated mmio-mux
MAINTAINERS: Add git tree for Sparx5
arm64: dts: sparx5: Add hwmon temperature sensor
arm64: dts: sparx5: Add Sparx5 eMMC support
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Olof Johansson <[email protected]>
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into arm/dt
ARM: DT: Hisilicon ARM32 SoCs DT updates for 5.10
- Update the SP804 nodes to have the correct clocks and
clock names for the hi3620 SoC
- Update the SP805 nodes to have the correct clocks and
clock names for the hix5hd2 SoC
* tag 'hisi-arm32-dt-for-5.10' of git://github.com/hisilicon/linux-hisi:
ARM: dts: hisilicon: Fix SP805 clocks
ARM: dts: hisilicon: Fix SP804 users
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Olof Johansson <[email protected]>
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into arm/dt
ARM64: DT: Hisilicon ARM64 SoCs DT updates for 5.10
- Change the status properties from "ok" to "okay" for
all the hisilicon SoCs
- Update the SP805 nodes to have the correct clocks and
clock names for the hi3660 and hi6220 SoCs
* tag 'hisi-arm64-dt-for-5.10' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisilicon: Fix SP805 clocks
arm64: dts: hisilicon: replace status value "ok" by "okay"
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Olof Johansson <[email protected]>
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The convention for node names is to use hyphens, not underscores.
dtschema for pca95xx expects GPIO hogs to end with 'hog' prefix.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Correct the property for reset GPIOs of the GPIO expander.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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The convention for node names is to use hyphens, not underscores.
dtschema for pca95xx expects GPIO hogs to end with 'hog' prefix.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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The PCA9539 GPIO expander requires GPIO controller properties to operate
properly.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Acked-by: Tony Lindgren <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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All am437x boards have been converted to use new driver, so drop legacy
cpsw dt node.
Signed-off-by: Grygorii Strashko <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, Switch all am437x boards to use new cpsw switch driver. Those boards
have or 2 Ext. port wired and configured in dual_mac mode by default, or
only 1 Ext. port.
Signed-off-by: Grygorii Strashko <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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Add DT node for the new cpsw switchdev based driver.
Signed-off-by: Grygorii Strashko <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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Add support for the eMMC and SD card connected on the common
processor board
sdhci0 is connected to an eMMC while sdhci1 is connected to the
micro SD slot.
Signed-off-by: Faiz Abbas <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Tested-by: Vignesh Raghavendra <[email protected]>
Reviewed-by: Sekhar Nori <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Add support for MMC/SD controller nodes present on TI's j7200 SoCs.
There are two nodes:
1. sdhci0 (8 bit bus width, 200 MHz, HS200, 200 MBps)
2. sdhci1 (4 bit bus width, 50 MHz, HS, 25 MBps)
Signed-off-by: Faiz Abbas <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Tested-by: Vignesh Raghavendra <[email protected]>
Reviewed-by: Sekhar Nori <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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J7200 SoM has a HyperFlash connected to HyperBus memory controller. But
HyperBus is muxed with OSPI, therefore keep HyperBus node disabled.
Bootloader will detect the mux and enable the node as required.
Signed-off-by: Vignesh Raghavendra <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Reviewed-by: Sekhar Nori <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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J7200 has a Flash SubSystem that has one OSPI and one HyperBus.. Add
DT nodes for HyperBus controller for now.
Signed-off-by: Vignesh Raghavendra <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Reviewed-by: Sekhar Nori <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Add DT nodes for I2C GPIO expanders on main_i2c0 and main_i2c1 and
also add the pinmux corresponding to these I2C instances.
Signed-off-by: Vignesh Raghavendra <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Reviewed-by: Sekhar Nori <[email protected]>
Reviewed-by: Faiz Abbas <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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J7200 has 7 I2Cs in main domain, 2 I2Cs in MCU and 1 in wakeup domain.
Add DT nodes for the same.
Signed-off-by: Vignesh Raghavendra <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Reviewed-by: Sekhar Nori <[email protected]>
Reviewed-by: Faiz Abbas <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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defs
The TI J7200 EVM base board has TI DP83867 PHY connected to external CPSW
NUSS Port 1 in rgmii-rxid mode.
Hence, add pinmux and Ethernet PHY configuration for TI J7200 SoC MCU
Gigabit Ethernet two ports Switch subsystem (CPSW NUSS).
Signed-off-by: Grygorii Strashko <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Reviewed-by: Suman Anna <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Add DT node for The TI J7200 MCU SoC Gigabit Ethernet two ports Switch
subsystem (MCU CPSW NUSS).
Signed-off-by: Grygorii Strashko <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Reviewed-by: Suman Anna <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Add DT node for Main NAVSS CPTS module.
Signed-off-by: Grygorii Strashko <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Reviewed-by: Suman Anna <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Add the ringacc and udmap nodes for Main and MCU NAVSS.
Signed-off-by: Peter Ujfalusi <[email protected]>
Signed-off-by: Grygorii Strashko <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Reviewed-by: Suman Anna <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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sm8250 has 24 thermal sensors split across two tsens controllers. Add
the thermal zones to expose them and wireup the cpus to throttle on
crossing passive temperature thresholds.
Signed-off-by: Amit Kucheria <[email protected]>
Link: https://lore.kernel.org/r/89b83b3caa4e32db08fe402cfa510feb25232aa0.1599732068.git.amitk@kernel.org
Signed-off-by: Bjorn Andersson <[email protected]>
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Add arm-pmu node on stm32mp15.
Signed-off-by: Alexandre Torgue <[email protected]>
Signed-off-by: Marek Vasut <[email protected]> # update to linux-next
Tested-by: Marek Vasut <[email protected]> # on DH PDK2 and Avenger96
Signed-off-by: Alexandre Torgue <[email protected]>
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This patch adds FMC2 External Bus Interface support on stm32mp157c.
Signed-off-by: Christophe Kerello <[email protected]>
Signed-off-by: Alexandre Torgue <[email protected]>
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The "eMMC high-speed DDR mode (3.3V I/O)" at 50MHz is supported on
the eMMC-interface of the lxa-mc1. Set it in the device tree to
benefit from the speed improvement.
Signed-off-by: Ahmad Fatoum <[email protected]>
Signed-off-by: Holger Assmann <[email protected]>
Signed-off-by: Alexandre Torgue <[email protected]>
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The display PWM channel is number 3 (PWM2 CH4), make it so.
Fixes: 34e0c7847dcf ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board")
Signed-off-by: Marek Vasut <[email protected]>
Cc: Alexandre Torgue <[email protected]>
Cc: Maxime Coquelin <[email protected]>
Cc: Patrice Chotard <[email protected]>
Cc: Patrick Delaunay <[email protected]>
Cc: [email protected]
To: [email protected]
Signed-off-by: Alexandre Torgue <[email protected]>
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The DH AV96 has RTS/CTS lines available on UART7, describe them in DT.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Alexandre Torgue <[email protected]>
Cc: Maxime Coquelin <[email protected]>
Cc: Patrice Chotard <[email protected]>
Cc: Patrick Delaunay <[email protected]>
Cc: [email protected]
To: [email protected]
Signed-off-by: Alexandre Torgue <[email protected]>
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On the production revision of the SoM, 587-200, the PHY reset GPIO and
touchscreen IRQs are swapped to prevent collision between EXTi IRQs,
reflect that in DT.
Fixes: 34e0c7847dcf ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board")
Signed-off-by: Marek Vasut <[email protected]>
Cc: Alexandre Torgue <[email protected]>
Cc: Maxime Coquelin <[email protected]>
Cc: Patrice Chotard <[email protected]>
Cc: Patrick Delaunay <[email protected]>
Cc: [email protected]
To: [email protected]
Signed-off-by: Alexandre Torgue <[email protected]>
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Previously the FIFO on the stm32h743 usart was not utilized, because
the stm32f7 compatible configures it without FIFO support.
Signed-off-by: Tobias Schramm <[email protected]>
Signed-off-by: Alexandre Torgue <[email protected]>
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The stm32 spi driver tries to determine the fifo size of spi devices
dynamically. However, if the spi was already configured by the bootloader
the fifo size check can become an endless loop, because the driver
expects the spi to be in its initial "after device reset" state. The
driver does already support resetting the spi device at probe, thus this
patch adds only the required device tree properties
Signed-off-by: Tobias Schramm <[email protected]>
Signed-off-by: Alexandre Torgue <[email protected]>
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Declare LTDC (display controller) on stm32h743.
Signed-off-by: Tobias Schramm <[email protected]>
Signed-off-by: Alexandre Torgue <[email protected]>
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The DH PDK2 has RTS/CTS lines available on UART8, describe them in DT.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Alexandre Torgue <[email protected]>
Cc: Maxime Coquelin <[email protected]>
Cc: Patrice Chotard <[email protected]>
Cc: Patrick Delaunay <[email protected]>
Cc: [email protected]
To: [email protected]
Signed-off-by: Alexandre Torgue <[email protected]>
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The QSPI CS2 is not used on DHCOM, remove the pinmux settings.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Alexandre Torgue <[email protected]>
Cc: Maxime Coquelin <[email protected]>
Cc: Patrice Chotard <[email protected]>
Cc: Patrick Delaunay <[email protected]>
Cc: [email protected]
To: [email protected]
Signed-off-by: Alexandre Torgue <[email protected]>
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Add extra RTS/CTS line pinmux for STM32MP1 UART8.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Alexandre Torgue <[email protected]>
Cc: Maxime Coquelin <[email protected]>
Cc: Patrice Chotard <[email protected]>
Cc: Patrick Delaunay <[email protected]>
Cc: [email protected]
To: [email protected]
Acked-by: Fabrice Gasnier <[email protected]>
Signed-off-by: Alexandre Torgue <[email protected]>
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Add support for Seeed Studio's stm32mp157c odyssey board.
Board consists of SoM with stm32mp157c with 4GB eMMC and 512 MB DDR3 RAM
and carrier board with USB and ETH interfaces, SD card connector,
wifi and BT chip AP6236.
In this patch only basic kernel boot is supported and interfacing
SD card and on-board eMMC.
Signed-off-by: Marcin Sloniewski <[email protected]>
Reviewed-by: Ahmad Fatoum <[email protected]>
Signed-off-by: Alexandre Torgue <[email protected]>
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Document device tree bindings of Seeed SoM and carrier board.
Signed-off-by: Marcin Sloniewski <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Alexandre Torgue <[email protected]>
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Add the "seeed" vendor prefix for Seeed Technology Co., Ltd
Website: https://www.seeedstudio.com/
Signed-off-by: Marcin Sloniewski <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Alexandre Torgue <[email protected]>
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