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| author | Aswath Govindraju <[email protected]> | 2023-03-31 14:30:24 +0530 |
|---|---|---|
| committer | Vignesh Raghavendra <[email protected]> | 2023-06-14 16:12:19 +0530 |
| commit | da61731dc7f5d7a676acd81124229b57e6fbe0ef (patch) | |
| tree | 03f22fbf16e4e9181b685d9349d8b649b90ed99a /tools/perf/scripts/python | |
| parent | 80cfbf2f4ac735ab8e72a3c70188c433f06810c1 (diff) | |
arm64: dts: ti: k3-j721s2-common-proc-board: Enable SERDES0
Configure first lane to PCIe, the second lane to USB and the last two lanes
to eDP. Also, add sub-nodes to SERDES0 DT node to represent SERDES0 is
connected to PCIe.
Signed-off-by: Aswath Govindraju <[email protected]>
Signed-off-by: Matt Ranostay <[email protected]>
Signed-off-by: Ravi Gunasekaran <[email protected]>
Reviewed-by: Roger Quadros <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions