ARM: dts: Update the parent for Audss clocks in Exynos5420

Currently CLK_FOUT_EPLL was set as one of the parents of AUDSS mux.
As per the user manual, it should be CLK_MAU_EPLL.

The problem surfaced when the bootloader in Peach-pit board set
the EPLL clock as the parent of AUDSS mux. While booting the kernel,
we used to get a system hang during late boot if CLK_MAU_EPLL was
disabled.

Signed-off-by: Tushar Behera <[email protected]>
Signed-off-by: Shaik Ameer Basha <[email protected]>
Reported-by: Kevin Hilman <[email protected]>
Tested-by: Javier Martinez Canillas <[email protected]>
Tested-by: Doug Anderson <[email protected]>
Signed-off-by: Kukjin Kim <[email protected]>

0 files changed, 0 insertions, 0 deletions