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| author | Imre Deak <imre.deak@intel.com> | 2022-04-21 19:22:21 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2022-04-25 14:45:33 +0300 |
| commit | af2cbc6ef967f61711a3c40fca5366ea0bc7fecc (patch) | |
| tree | ec580bb1f2c4fd1685774038c6efd84c8103ebba /tools/perf/scripts/python | |
| parent | 1e1d2e185358b9383807ccfc30f51b642ebe3b8a (diff) | |
drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses
Fix typo in the _SEL_FETCH_PLANE_BASE_1_B register base address.
Fixes: a5523e2ff074a5 ("drm/i915: Add PSR2 selective fetch registers")
References: https://gitlab.freedesktop.org/drm/intel/-/issues/5400
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: <stable@vger.kernel.org> # v5.9+
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220421162221.2261895-1-imre.deak@intel.com
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions