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| author | Prajna Rajendra Kumar <[email protected]> | 2024-05-14 11:45:08 +0100 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2024-05-27 01:33:16 +0100 |
| commit | 9c84429324ea2b5bc537ef8ec7d3727579d37116 (patch) | |
| tree | f96d1bd888246c12beba0a01e3606620c418b215 /tools/perf/scripts/python | |
| parent | a7ed3a11202d90939a3d00ffcc8cf50703cb7b35 (diff) | |
spi: spi-microchip-core: Add support for GPIO based CS
The SPI "hard" controller within the PolarFire SoC is capable of
handling eight CS lines, but only one CS line is wired. Therefore, use
GPIO descriptors to configure additional CS lines.
Signed-off-by: Prajna Rajendra Kumar <[email protected]>
Link: https://msgid.link/r/[email protected]
Acked-by: Conor Dooley <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions