aboutsummaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python
diff options
context:
space:
mode:
authorNeilBrown <[email protected]>2018-06-07 08:04:21 +1000
committerGreg Kroah-Hartman <[email protected]>2018-06-17 09:05:11 +0200
commit97738374a310b9116f9c33832737e517226d3722 (patch)
tree12a59d1f16acd4bd6d4264b131d5b45e8687bb9e /tools/perf/scripts/python
parentbf732c6bff5b5767a1c2ec6495dccd76d71c05eb (diff)
staging: mt7621-dts: correct various clock frequencies.
The MT7621 documentation says that the sys clock - also known as OCP clock for the Open Core Protocol - can be configured to 1/3 or 1/4 of the CPU clock. Testing on my hardware, using the fact that the SPI clock is based on the OCP clock and measuring transfer rates, shows a clock of a little over 200MHz with a CPU clock of 900MHz. So assume 1/4 is the default. Also, the nor-flash in the gbpc1 is documented as accepting 50MHz for request requests, and higher for other requests. So set maximum to 50MHz. Signed-off-by: NeilBrown <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions