staging: mt7621-spi: revised half-duplex message handling

The mt7621 SPI engine has a 32 byte buffer and the driver
currently only allows 32-byte read requests and 36 bytes writes
(there is a 4byte op/addr buffer).

This is an unnecessary limitation.  As the SPI clock is controlled
by the host it is quite acceptable to send a larger message in
multiple smaller transactions.  As long as Chip Select is kept asserted
the whole time, the SPI engine can be run multiple times for
a single SPI message.

This patch factors out the transaction logic and calls for each
transfer in the message.  A write transfer might leave bytes in the
buffer to be combined with a following read transfer, as this is
a common pattern.

With this in place, we can remove the current max_transfer_size limit.

In testing, this increases the read throughput for a NOR flash chip
from 1.4MB/s to 2.3MB/s, a 50% improvement.

Signed-off-by: NeilBrown <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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