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| author | Jonathan Cameron <[email protected]> | 2022-05-08 18:56:45 +0100 |
|---|---|---|
| committer | Jonathan Cameron <[email protected]> | 2022-06-14 11:53:17 +0100 |
| commit | 8ff2eb625c353b1491d9f89f1dfd52e7aef5734c (patch) | |
| tree | 423e41ac8e3293d447045d051affe94f06082eb5 /tools/perf/scripts/python | |
| parent | b9ac08b3282a95fcefb057c2886028a6807725d8 (diff) | |
iio: frequency: ad9523: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Updated help text to 'may' require buffers to be in their own cacheline.
Fixes: cd1678f96329 ("iio: frequency: New driver for AD9523 SPI Low Jitter Clock Generator")
Signed-off-by: Jonathan Cameron <[email protected]>
Acked-by: Nuno Sá <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions