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| author | Jonathan Cameron <[email protected]> | 2022-05-08 18:56:44 +0100 |
|---|---|---|
| committer | Jonathan Cameron <[email protected]> | 2022-06-14 11:53:17 +0100 |
| commit | b9ac08b3282a95fcefb057c2886028a6807725d8 (patch) | |
| tree | 499ec5e0516c236a2805d2f3b54891cd4ac88c8f /tools/perf/scripts/python | |
| parent | 3637c49ed54632d7c221af718d2d7b1d381d4b6e (diff) | |
iio: dac: ti-dac7612: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Updated help text to 'may' require buffers to be in their own cacheline.
Fixes: 977724d20584 ("iio:dac:ti-dac7612: Add driver for Texas Instruments DAC7612")
Signed-off-by: Jonathan Cameron <[email protected]>
Cc: Ricardo Ribalda <[email protected]>
Acked-by: Nuno Sá <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions