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| author | Mark Brown <[email protected]> | 2024-05-29 11:24:37 +0100 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2024-05-29 11:24:37 +0100 |
| commit | 4ccaf60062c3682cf4f1438b143c29648edadfda (patch) | |
| tree | 7e8a3e3f46cc02de85fd3e7c48ac9c091e48b58d /tools/perf/scripts/python/stackcollapse.py | |
| parent | d879675bc09a18e2f32c1261cb9e1a15662bc08d (diff) | |
| parent | 9c84429324ea2b5bc537ef8ec7d3727579d37116 (diff) | |
Add support for GPIO based CS
Merge series from Prajna Rajendra Kumar <[email protected]>:
The Microchip PolarFire SoC SPI "hard" controller supports eight
chip selects. However, only one chip select is physically wired.
Therefore, use GPIO descriptors to configure additional chip select
lines.
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions