diff options
| author | Prajna Rajendra Kumar <[email protected]> | 2024-05-14 11:45:06 +0100 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2024-05-27 01:33:14 +0100 |
| commit | 3b4c0fbc19930af0904fb5995ed4e7b6ffe0b237 (patch) | |
| tree | 1678ed837f50ab4db163ed34320377f41c52fb5b /tools/perf/scripts/python/stackcollapse.py | |
| parent | f44b3730b038363475a3f84bee2038d8b6448ed8 (diff) | |
spi: dt-bindings: Add num-cs property for mpfs-spi
The PolarFire SoC SPI "hard" controller supports eight CS lines, out of
which only one CS line is physically wired. The default value of
'num-cs' was never set and it did not didn't impose a maximum value.
To reflect this hardware limitation in the device tree, the binding
enforces that the 'num-cs' property cannot exceed 1 unless additional
CS lines are explicitly defined using GPIO descriptors.
Fixes: 2da187304e55 ("spi: add bindings for microchip mpfs spi")
Signed-off-by: Prajna Rajendra Kumar <[email protected]>
Link: https://msgid.link/r/[email protected]
Reviewed-by: Conor Dooley <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions