diff options
| author | David Virag <virag.david003@gmail.com> | 2024-08-06 14:11:46 +0200 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2024-08-08 10:10:21 +0200 |
| commit | b9dee49cc6f9efa97eee059d03b704dec0f45658 (patch) | |
| tree | adb74f76ece329ebc6f058dfb07ca8e00d07a3a0 /tools/perf/scripts/python/netdev-times.py | |
| parent | 59baa83e30f82b74b4c7dc07c20eac9899b6c0c6 (diff) | |
dt-bindings: clock: exynos7885: Add indices for USB clocks
Exynos7885 SoC has a DWC3 USB Controller with Exynos USB PHY which in
theory supports USB3 SuperSpeed, but is only used as USB2 in all known
devices.
These, of course, need some clocks.
Add indices for these clocks.
Signed-off-by: David Virag <virag.david003@gmail.com>
Link: https://lore.kernel.org/r/20240806121157.479212-4-virag.david003@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/netdev-times.py')
0 files changed, 0 insertions, 0 deletions