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author | Stephen Boyd <sboyd@kernel.org> | 2024-09-03 13:03:10 -0700 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2024-09-03 13:03:10 -0700 |
commit | 1d777b05da6adf970c2cd2e07f5f1953685df110 (patch) | |
tree | 8643ceae32f7f09ac55a62a1dc44bd8b116a2f8e /tools/perf/scripts/python/netdev-times.py | |
parent | 8400291e289ee6b2bf9779ff1c83a291501f017b (diff) | |
parent | 2d6e9ee7cb3e79b1713783c633b13af9aeffc90c (diff) |
Merge tag 'clk-microchip-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into clk-microchip
Pull Microchip clk driver updates from Claudiu Beznea:
- support for the Microchip SAM9X7 SoC as follows:
- updates on the PLL drivers
- a new clock driver was added for SAM9X7
- dt-binding documentation updates (for the new clock driver and for
the slow clock controller that SAM9X7 is using)
- a fix for the Microchip SAMA7G5 clock driver to avoid allocating mode
than necessary memory
* tag 'clk-microchip-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
clk: at91: sama7g5: Allocate only the needed amount of memory for PLLs
clk: at91: sam9x7: add sam9x7 pmc driver
dt-bindings: clock: at91: Allow PLLs to be exported and referenced in DT
clk: at91: sama7g5: move mux table macros to header file
clk: at91: sam9x7: add support for HW PLL freq dividers
clk: at91: clk-sam9x60-pll: re-factor to support individual core freq outputs
dt-bindings: clocks: atmel,at91rm9200-pmc: add sam9x7 clock controller
dt-bindings: clocks: atmel,at91sam9x5-sckc: add sam9x7
Diffstat (limited to 'tools/perf/scripts/python/netdev-times.py')
0 files changed, 0 insertions, 0 deletions