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authorClaudiu Beznea <claudiu.beznea@tuxon.dev>2024-07-14 17:13:15 +0300
committerClaudiu Beznea <claudiu.beznea@tuxon.dev>2024-08-24 17:44:11 +0300
commit2d6e9ee7cb3e79b1713783c633b13af9aeffc90c (patch)
tree8643ceae32f7f09ac55a62a1dc44bd8b116a2f8e /tools/perf/scripts/python/netdev-times.py
parent33013b43e2715c7e061ae052825edd87fd278330 (diff)
clk: at91: sama7g5: Allocate only the needed amount of memory for PLLs
The maximum number of PLL components on SAMA7G5 is 3 (one fractional part and 2 dividers). Allocate the needed amount of memory for sama7g5_plls 2d array. Previous code used to allocate 7 array entries for each PLL. While at it, replace 3 with PLL_COMPID_MAX in the loop which parses the sama7g5_plls 2d array. Fixes: cb783bbbcf54 ("clk: at91: sama7g5: add clock support for sama7g5") Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20240714141315.19480-1-claudiu.beznea@tuxon.dev Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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