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authorBiju Das <biju.das@bp.renesas.com>2018-08-02 15:56:34 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2018-08-27 17:00:19 +0200
commit62f32dde334302d7ebb2b3c150f404a61cfcf55e (patch)
tree6c47423da3cffd47c750843ebc30720602609dbb /tools/perf/scripts/python/mem-phys-addr.py
parente59bb7be47af31d293d6f94d2fad11188d2ba0e7 (diff)
clk: renesas: Add r8a774a1 CPG Core Clock Definitions
Add all RZ/G2M Clock Pulse Generator Core Clock Outputs, as listed in Table 8.2b ("List of Clocks [RZ/G2M]") of the RZ/G2M Hardware User's Manual. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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