diff options
| author | Takeshi Kihara <takeshi.kihara.df@renesas.com> | 2018-07-25 21:14:17 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-08-27 17:00:19 +0200 |
| commit | e59bb7be47af31d293d6f94d2fad11188d2ba0e7 (patch) | |
| tree | 929eff9f1873fd82c6049a9f0e0c17e6f690d939 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | f3824deb46332d1f037f9a26c8f01e3143e64c7e (diff) | |
clk: renesas: r8a77965: Add SATA clock
This patch adds SATA clock to the R8A77965 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[wsa: rebased to upstream base]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions