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| author | Dmitry Baryshkov <[email protected]> | 2023-01-13 14:05:41 +0200 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-01-18 22:50:01 -0600 |
| commit | 495bc5a7c4a1277d90701cbc1c9c2fd0504db10c (patch) | |
| tree | 3fe63b380b93ee0c20877f2570afe6ca096d2779 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 6fb03dd0b40aa83a3a04390ef539f1547b77ca1d (diff) | |
clk: qcom: cpu-8996: fix ACD initialization
The vendor kernel applies different order while programming SSSCTL and
L2ACDCR registers on power and performance clusters. However it was
demonstrated that doing this upstream results in the board reset. Make
both clusters use the same sequence, which fixes the reset.
Signed-off-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions