aboutsummaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/failed-syscalls-by-pid.py
diff options
context:
space:
mode:
authorMarek Vasut <[email protected]>2017-07-09 15:28:14 +0200
committerStephen Boyd <[email protected]>2017-07-17 11:51:00 -0700
commitdbf6b16f56830c995515e0d7350e9c639e6d186f (patch)
treeec448c0e23be7e2e31c36deee221cb5118f0fdfc /tools/perf/scripts/python/failed-syscalls-by-pid.py
parent73100e79c7368dd30c06bcfc04252bab5dc48783 (diff)
clk: vc5: Add support for IDT VersaClock 5P49V6901
Update IDT VersaClock 5 driver to support IDT VersaClock 6 5P49V6901. This chip has two clock inputs (external XTAL or external CLKIN), four fractional dividers (FODs) and five clock outputs (four universal clock outputs and one reference clock output at OUT0_SELB_I2C). Signed-off-by: Marek Vasut <[email protected]> Cc: Alexey Firago <[email protected]> Cc: Stephen Boyd <[email protected]> Cc: Michael Turquette <[email protected]> Cc: Laurent Pinchart <[email protected]> Cc: [email protected] Tested-by: Laurent Pinchart <[email protected]> on Salvator-XS with the display LVDS output. Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/failed-syscalls-by-pid.py')
0 files changed, 0 insertions, 0 deletions