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authorDinh Nguyen <[email protected]>2022-11-14 17:02:16 -0600
committerUlf Hansson <[email protected]>2022-12-07 13:22:37 +0100
commitd0ce6aca9ddf1177d9f2757c9fed502682934343 (patch)
tree7eca4114c79ed7e256311a817fb4c546b8c0d955 /tools/perf/scripts/python/failed-syscalls-by-pid.py
parentef87bd81cb881377c1eaf512167b0522c825b012 (diff)
clk: socfpga: remove the setting of clk-phase for sdmmc_clk
Now that the SDMMC driver supports setting the clk-phase, we can remove the need to do it in the clock driver. Acked-by: Stephen Boyd <[email protected]> Signed-off-by: Dinh Nguyen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
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