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| author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2024-03-21 16:46:38 +0530 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2024-04-21 12:28:49 -0500 |
| commit | ed9b196418d4e2fa4f6c27b61a92c2038e1ba04d (patch) | |
| tree | 0a6b0879afbd48d988976c1c801ce705d853438b /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 0c4d19b125401957123989a25094972cf0e77670 (diff) | |
ARM: dts: qcom: ipq4019: Add PCIe bridge node
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
for each controller instance. Hence, add a node to represent the bridge.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-18-1eb790c53e43@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions