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| author | Chanho Park <chanho61.park@samsung.com> | 2021-10-18 21:42:04 +0900 |
|---|---|---|
| committer | Martin K. Petersen <martin.petersen@oracle.com> | 2021-10-27 23:10:10 -0400 |
| commit | e387d448e4899f4bbf7c8151472a2fed72063d82 (patch) | |
| tree | 3661df1fb6c8d0a29de4b5aa82de8959977de782 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 10fb4f87438d99b2ef06aea38ca2f0454725e8b5 (diff) | |
scsi: ufs: ufs-exynos: Change pclk available max value
To support 167MHz PCLK, we need to adjust the maximum value.
Link: https://lore.kernel.org/r/20211018124216.153072-4-chanho61.park@samsung.com
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions