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| author | Krzysztof Kozlowski <[email protected]> | 2023-05-16 17:45:37 +0200 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-05-24 21:50:47 -0700 |
| commit | 5ef00c06ea5e4e0de1f63d2c620f671750f73f9b (patch) | |
| tree | 4ab0a0d5767a125475c85308b687c7209cd56044 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | a158f00cdf68852850df231526ce0df0bb7dc1b4 (diff) | |
arm64: dts: qcom: sm8550: enable DISPCC by default
Enable the Display Clock Controller by default in SoC DTSI so unused
clocks can be turned off. It does not require any external resources,
so as core SoC component should be always available to boards.
Suggested-by: Konrad Dybcio <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions