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authorMichael Tretter <[email protected]>2021-01-21 08:16:55 +0100
committerStephen Boyd <[email protected]>2021-02-08 18:31:25 -0800
commit5a9b1258170836151d7c0465523b7e869a2d21fb (patch)
tree1b56bb389d1e25a74293d7678d620a770071f901 /tools/perf/scripts/python/export-to-sqlite.py
parent58ee6baf393ef365b33e4d98d966b21e5247165a (diff)
soc: xilinx: vcu: remove calculation of PLL configuration
As the consumers are now responsible for setting the clock rate via clock framework, the clock rate is now calculated using round_rate and the driver does not need to calculate the clock rate beforehand. Remove the code that calculates the PLL configuration. Signed-off-by: Michael Tretter <[email protected]> Acked-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
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