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authorMichael Tretter <[email protected]>2021-01-21 08:16:54 +0100
committerStephen Boyd <[email protected]>2021-02-08 18:31:25 -0800
commit58ee6baf393ef365b33e4d98d966b21e5247165a (patch)
tree4ce5a55c7482ec48a57a54ff53972c29bdbe3e57 /tools/perf/scripts/python/export-to-sqlite.py
parent4472e1849db7f719bbf625890096e0269b5849fe (diff)
soc: xilinx: vcu: make the PLL configurable
Do not configure the PLL when probing the driver, but register the clock in the clock framework and do the configuration based on the respective callbacks. This is necessary to allow the consumers, i.e., encoder and decoder drivers, of the xlnx_vcu clock provider to set the clock rate and actually enable the clocks without relying on some pre-configuration. Signed-off-by: Michael Tretter <[email protected]> Acked-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
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