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author | Vladimir Oltean <[email protected]> | 2022-08-18 14:54:54 +0300 |
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committer | Jakub Kicinski <[email protected]> | 2022-08-22 17:45:46 -0700 |
commit | 2401bd9532fe750974e4ff45fdad954f6f7dc694 (patch) | |
tree | d38d092840bd3523d1eb8e8ac47a803b3f7623d4 /tools/perf/scripts/python/check-perf-trace.py | |
parent | 526512f675c8c8d084071c1427f83f8faca96072 (diff) |
dt-bindings: net: dsa: microchip: add missing CPU port phy-mode to example
The ksz_switch_chips[] element for KSZ9477 says that port 5 is an xMII
port and it supports speeds of 10/100/1000. The device tree example does
declare a fixed-link at 1000, and RGMII is the only one of those modes
that supports this speed, so use this phy-mode.
The microchip,ksz8565 compatible string is not supported by the
microchip driver, however on Microchip's product page it says that there
are 5 ports, 4 of which have internal PHYs and the 5th is an
MII/RMII/RGMII port. It's a bit strange that this is port@6, but it is
probably just the way it is. Select an RGMII phy-mode for this one as
well.
Signed-off-by: Vladimir Oltean <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Jakub Kicinski <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions