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authorVladimir Oltean <[email protected]>2022-08-18 14:54:53 +0300
committerJakub Kicinski <[email protected]>2022-08-22 17:45:46 -0700
commit526512f675c8c8d084071c1427f83f8faca96072 (patch)
tree563750e0dd0b75e6565668fa18d6a83cbaf8b76a /tools/perf/scripts/python/check-perf-trace.py
parentb975b73425cde436f3e66e4cd992f6e6fb0998e5 (diff)
dt-bindings: net: dsa: b53: add missing CPU port phy-mode to example
Looking at b53_srab_phylink_get_caps() I get no indication of what PHY modes does port 8 support, since it is implemented circularly based on the p->mode retrieved from the device tree (and in PHY_INTERFACE_MODE_NA it reports nothing to supported_interfaces). However if I look at the b53_switch_chips[] element for BCM58XX_DEVICE_ID, I see that port 8 is the IMP port, and SRAB means the IMP port is internal to the SoC. So use phy-mode = "internal" in the example. Note that this will make b53_srab_phylink_get_caps() go through the "default" case and report PHY_INTERFACE_MODE_INTERNAL to supported_interfaces, which is probably a good thing. Signed-off-by: Vladimir Oltean <[email protected]> Acked-by: Rob Herring <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: Jakub Kicinski <[email protected]>
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