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authorSherry Sun <[email protected]>2022-04-27 09:51:36 +0800
committerBorislav Petkov <[email protected]>2022-07-22 14:31:30 +0200
commitbe76ceaf03bc04e74be5e28f608316b73c2b04ad (patch)
tree5a9fc74eb571e14395f6e325812fd588852c1404 /tools/perf/scripts/python/bin/export-to-postgresql-report
parentff6992735ade75aae3e35d16b17da1008d753d28 (diff)
EDAC/synopsys: Use the correct register to disable the error interrupt on v3 hw
v3.x Synopsys EDAC DDR doesn't have the QOS Interrupt register. Use the ECC Clear Register to disable the error interrupts instead. Fixes: f7824ded4149 ("EDAC/synopsys: Add support for version 3 of the Synopsys EDAC DDR") Signed-off-by: Sherry Sun <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> Reviewed-by: Shubhrajyoti Datta <[email protected]> Acked-by: Michal Simek <[email protected]> Cc: <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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