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authorTim Gore <tim.gore@intel.com>2016-02-04 11:49:34 +0000
committerTvrtko Ursulin <tvrtko.ursulin@intel.com>2016-02-04 14:22:31 +0000
commitd5165ebd527c54bbe3761fd5810dede32b5246a3 (patch)
tree7d7c6fd37ac8a4fac2f54af848be95f0fe0cdcb5 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py
parent58d4d32f431a560baff5fbb6deae8ad324552dde (diff)
drm/i915: implement WaIncreaseDefaultTLBEntries
WaIncreaseDefaultTLBEntries increases the number of TLB entries available for GPGPU workloads and gives significant ( > 10% ) performance gain for some OCL benchmarks. Put this in a new function that can be a place for workarounds that are GT related but not required per ring. This function is called on driver load and also after a reset and on resume, so it is safe for workarounds that get clobbered in these situations. This function currently has just this one workaround. v2: This was originally split into 3 patches but following review feedback was squashed into 1. I have not incorporated some style comments from Chris Wilson as I felt that after defining and intialising a temporary variable and then adding an additional if block to only write the register if the temporary variable had been set, this didn't really give a net gain. v3: Resending in the hope that BAT will run v4: Change subject line to trigger BAT (please!) Signed-off-by: Tim Gore <tim.gore@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1454586574-2343-1-git-send-email-tim.gore@intel.com
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