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author | Ramalingam C <ramalingam.c@intel.com> | 2016-02-03 18:20:46 +0530 |
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committer | Jani Nikula <jani.nikula@intel.com> | 2016-02-04 11:07:35 +0200 |
commit | 58d4d32f431a560baff5fbb6deae8ad324552dde (patch) | |
tree | e24d7480f7300a6b8e287998129d90d19fa8f510 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py | |
parent | de4726649b6b1d7f3f02b2031ee99e067cb71e2d (diff) |
drm/i915/dsi: Configure DSI after enabling DSI pll
We need to enable DSI PLL before configuring the DSI registers.
This has worked before on BYT/CHV, but BXT is more fussy.
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Tested-by: Mika Kahola <mika.kahola@intel.com> # BXT
Tested-by: Jani Nikula <jani.nikula@intel.com> # BYT
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1454503846-12103-1-git-send-email-ramalingam.c@intel.com
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py')
0 files changed, 0 insertions, 0 deletions