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author | Chintan Vankar <[email protected]> | 2024-04-22 18:15:15 +0530 |
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committer | Jakub Kicinski <[email protected]> | 2024-04-24 19:56:37 -0700 |
commit | 5bd8ebe4693c21851ef8a05343d43aa2d005dd53 (patch) | |
tree | d8b66baa55842733ab88fb97fe4612ceda7f374a /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/SchedGui.py | |
parent | dd99c29e83e48acf80ee1855a5a6991b3e6523f5 (diff) |
net: ethernet: ti: am65-cpsw-nuss: Enable SGMII mode for J784S4 CPSW9G
TI's J784S4 SoC supports SGMII mode with CPSW9G instance of the CPSW
Ethernet Switch. Thus, enable it by adding SGMII mode to the
extra_modes member of the "j784s4_cpswxg_pdata" SoC data.
Reviewed-by: Roger Quadros <[email protected]>
Signed-off-by: Chintan Vankar <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jakub Kicinski <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/SchedGui.py')
0 files changed, 0 insertions, 0 deletions