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author | Frederik Haxel <[email protected]> | 2023-12-12 14:01:13 +0100 |
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committer | Palmer Dabbelt <[email protected]> | 2024-01-09 19:33:21 -0800 |
commit | 5daa3726410288075ba73c336bb2e80d6b06aa4d (patch) | |
tree | a1451f18f991c636ba19215a0a5ae7c4c3da52e1 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py | |
parent | 66f1e68093979816a23412a3fad066f5bcbc0360 (diff) |
riscv: Fixed wrong register in XIP_FIXUP_FLASH_OFFSET macro
During the refactoring, a bug was introduced in the rarly used
XIP_FIXUP_FLASH_OFFSET macro.
Fixes: bee7fbc38579 ("RISC-V CPU Idle Support")
Fixes: e7681beba992 ("RISC-V: Split out the XIP fixups into their own file")
Signed-off-by: Frederik Haxel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Palmer Dabbelt <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py')
0 files changed, 0 insertions, 0 deletions