diff options
| author | Christoph Hellwig <hch@lst.de> | 2019-06-03 12:52:47 +0200 |
|---|---|---|
| committer | Christoph Hellwig <hch@lst.de> | 2019-06-25 08:14:24 +0200 |
| commit | 80e61fcd23946cb222f780a49ab2eeb7ef1d3749 (patch) | |
| tree | b3b775066ec7062eccd1e0fd50d7be00475099c0 /scripts/gdb/linux/timerlist.py | |
| parent | 34ab03160eda51839be6dd5a939680963266707c (diff) | |
arc: remove the partial DMA_ATTR_NON_CONSISTENT support
The arc DMA code supports DMA_ATTR_NON_CONSISTENT allocations, but does
not provide a cache_sync operation. This means any user of it will
never be able to actually transfer cache ownership and thus cause
coherency bugs.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Evgeniy Paltsev <paltsev@synopsys.com>
Tested-by: Evgeniy Paltsev <paltsev@synopsys.com>
Diffstat (limited to 'scripts/gdb/linux/timerlist.py')
0 files changed, 0 insertions, 0 deletions