aboutsummaryrefslogtreecommitdiff
path: root/scripts/gdb/linux/timerlist.py
diff options
context:
space:
mode:
authorChristoph Hellwig <hch@lst.de>2019-06-03 12:48:57 +0200
committerChristoph Hellwig <hch@lst.de>2019-06-25 08:12:42 +0200
commit34ab03160eda51839be6dd5a939680963266707c (patch)
tree3c6810a7c739a86ea785d2707a2a6b5dedf754c9 /scripts/gdb/linux/timerlist.py
parentab746573c4055ae1fa226715502fb9bb9be29a79 (diff)
arm-nommu: remove the partial DMA_ATTR_NON_CONSISTENT support
The arm-nommu DMA code supports DMA_ATTR_NON_CONSISTENT allocations, but does not provide a cache_sync operation. This means any user of it will never be able to actually transfer cache ownership and thus cause coherency bugs. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com>
Diffstat (limited to 'scripts/gdb/linux/timerlist.py')
0 files changed, 0 insertions, 0 deletions