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authorGeert Uytterhoeven <geert+renesas@glider.be>2017-10-12 11:35:13 +0200
committerSimon Horman <horms+renesas@verge.net.au>2017-10-16 11:42:55 +0200
commit8684a24caa3d59d9ba03f1e6f9653b49ac78ec04 (patch)
tree71099ca8724746fd598c231e541cd2d917af07e1 /lib/timerqueue.c
parent60b672fe7e28358c1cffdab4724b203f6cf2901b (diff)
ARM: dts: r8a7792: Add missing clock for secondary CA15 CPU core
Currently only the primary CPU in the CA15 cluster has a clocks property, while the secondary CPU core is driven by the same clock. Add the missing clocks property to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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