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| author | Emil Renner Berthing <[email protected]> | 2023-04-01 19:19:14 +0800 |
|---|---|---|
| committer | Conor Dooley <[email protected]> | 2023-04-05 15:43:24 +0100 |
| commit | 3de0c91032580d4923624fe6ee773eddd1b574bc (patch) | |
| tree | b4db106fba33abc864b26e0200690c8105e63d76 /lib/test_fortify/write_overflow-strncpy-src.c | |
| parent | 7fce1e39f01900a294cd2c456c77f3e2512e0634 (diff) | |
dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator
Add bindings for the always-on clock and reset generator (AONCRG) on the
JH7110 RISC-V SoC by StarFive Ltd.
Reviewed-by: Conor Dooley <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Reviewed-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Hal Feng <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
Diffstat (limited to 'lib/test_fortify/write_overflow-strncpy-src.c')
0 files changed, 0 insertions, 0 deletions