diff options
author | Serge Semin <[email protected]> | 2020-05-29 16:11:50 +0300 |
---|---|---|
committer | Mark Brown <[email protected]> | 2020-05-29 15:55:42 +0100 |
commit | de4c2875a5ff2c886df60f2086c6affca83f890a (patch) | |
tree | b579db09868ce0b958a2ab88e5a38a7958a6a2ff /drivers/fpga/zynqmp-fpga.c | |
parent | b7d73cb63cbac70746ee0d506aa2fa16b5dc75a0 (diff) |
spi: dw: Set xfer effective_speed_hz
Seeing DW APB SSI controller doesn't support setting the exactly
requested SPI bus frequency, but only a rounded frequency determined
by means of the odd-numbered half-worded reference clock divider,
it would be good to tune the SPI core up and initialize the current
transfer effective_speed_hz. By doing so the core will be able to
execute the xfer-related delays with better accuracy.
Signed-off-by: Serge Semin <[email protected]>
Cc: Georgy Vlasov <[email protected]>
Cc: Ramil Zaripov <[email protected]>
Cc: Alexey Malahov <[email protected]>
Cc: Thomas Bogendoerfer <[email protected]>
Cc: Arnd Bergmann <[email protected]>
Cc: Feng Tang <[email protected]>
Cc: Andy Shevchenko <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Cc: [email protected]
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'drivers/fpga/zynqmp-fpga.c')
0 files changed, 0 insertions, 0 deletions