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| author | Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com> | 2017-04-20 02:46:39 +0900 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-05-15 09:46:31 +0200 |
| commit | 9097f5e3c278cb530da80352ed942143784a034c (patch) | |
| tree | f9c5288edb124d2963c5549719e0f0e571d10ceb /drivers/clk/socfpga | |
| parent | a0b381fafffaf07c939524c7708a270023d1ad95 (diff) | |
clk: renesas: r8a7796: Add PCIe clocks
This patch adds PCIEC{0,1} clocks for R8A7796 SoC.
Signed-off-by: Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/socfpga')
0 files changed, 0 insertions, 0 deletions