diff options
| author | Harunobu Kurokawa <[email protected]> | 2017-04-20 02:46:39 +0900 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2017-05-15 09:46:31 +0200 |
| commit | 9097f5e3c278cb530da80352ed942143784a034c (patch) | |
| tree | f9c5288edb124d2963c5549719e0f0e571d10ceb | |
| parent | a0b381fafffaf07c939524c7708a270023d1ad95 (diff) | |
clk: renesas: r8a7796: Add PCIe clocks
This patch adds PCIEC{0,1} clocks for R8A7796 SoC.
Signed-off-by: Harunobu Kurokawa <[email protected]>
Signed-off-by: Takeshi Kihara <[email protected]>
Signed-off-by: Yoshihiro Kaneko <[email protected]>
Signed-off-by: Geert Uytterhoeven <[email protected]>
| -rw-r--r-- | drivers/clk/renesas/r8a7796-cpg-mssr.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index ab8ad5e6f537..3ccd0551bbd6 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -136,6 +136,8 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { DEF_MOD("sdif2", 312, R8A7796_CLK_SD2), DEF_MOD("sdif1", 313, R8A7796_CLK_SD1), DEF_MOD("sdif0", 314, R8A7796_CLK_SD0), + DEF_MOD("pcie1", 318, R8A7796_CLK_S3D1), + DEF_MOD("pcie0", 319, R8A7796_CLK_S3D1), DEF_MOD("usb-dmac0", 330, R8A7796_CLK_S3D1), DEF_MOD("usb-dmac1", 331, R8A7796_CLK_S3D1), DEF_MOD("rwdt", 402, R8A7796_CLK_R), |