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authorAndrew Jones <[email protected]>2023-12-13 18:09:57 +0100
committerAnup Patel <[email protected]>2023-12-29 12:31:49 +0530
commitb26e70d72d12dc9ddb276898a78b1c35c7ab9b95 (patch)
treef7529b43071404d9c5b5947c8495f5043425374c /arch/riscv/kvm/vcpu_vector.c
parent6ccf119a4cc886678099a3526f37db98b67024d7 (diff)
KVM: riscv: selftests: Use register subtypes
Always use register subtypes in the get-reg-list test when registers have them. The only registers neglecting to do so were ISA extension registers. While we don't really need to use KVM_REG_RISCV_ISA_SINGLE (since it's zero), the main purpose is to avoid confusion and to self-document the tests. Also add print support for the multi registers like SBI extensions have, even though they're only used for debugging. Signed-off-by: Andrew Jones <[email protected]> Reviewed-by: Haibo Xu <[email protected]> Reviewed-by: Anup Patel <[email protected]> Signed-off-by: Anup Patel <[email protected]>
Diffstat (limited to 'arch/riscv/kvm/vcpu_vector.c')
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