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authorAnshuman Khandual <[email protected]>2023-06-14 12:29:41 +0530
committerCatalin Marinas <[email protected]>2023-06-14 14:37:33 +0100
commitdae169fd63f323b4dea1a01beb46c558e10315ac (patch)
tree7562b858586b43825b5e52f5b0cfba2299e283f7
parentb7c3a6eb4d2b6abf9aa2b08d70e5fc9008797a86 (diff)
arm64/sysreg: Rename TRBTRG_EL1 fields per auto-gen tools format
This renames TRBTRG_EL1 register fields per auto-gen tools format without causing any functional change in the TRBE driver. Cc: Will Deacon <[email protected]> Cc: Marc Zyngier <[email protected]> Cc: Mark Brown <[email protected]> Cc: Rob Herring <[email protected]> Cc: Suzuki K Poulose <[email protected]> Cc: James Morse <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Signed-off-by: Anshuman Khandual <[email protected]> Reviewed-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Catalin Marinas <[email protected]>
-rw-r--r--arch/arm64/include/asm/sysreg.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index ef8c9d81b6ad..0ba0f268ac79 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -267,8 +267,8 @@
#define TRBMAR_EL1_SH_SHIFT 8
#define TRBMAR_EL1_Attr_MASK GENMASK(7, 0)
#define TRBMAR_EL1_Attr_SHIFT 0
-#define TRBTRG_TRG_MASK GENMASK(31, 0)
-#define TRBTRG_TRG_SHIFT 0
+#define TRBTRG_EL1_TRG_MASK GENMASK(31, 0)
+#define TRBTRG_EL1_TRG_SHIFT 0
#define TRBIDR_FLAG BIT(5)
#define TRBIDR_PROG BIT(4)
#define TRBIDR_ALIGN_MASK GENMASK(3, 0)