diff options
| author | Rajendra Nayak <[email protected]> | 2020-01-07 16:15:26 +0530 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2020-02-25 20:52:55 -0800 |
| commit | 83e5e33eaba2df888cfd5a2cd9319c0637ebc93d (patch) | |
| tree | f78ffc6001bca0428dba24c3520ac978240641ce | |
| parent | e7bb680f917d019c6be660b77139ea5d75ccb8b0 (diff) | |
arm64: dts: qcom: sc7180: Add CPU topology
SC7180 has 2 big cores and 6 LITTLE ones in a single cluster
with shared L3.
Signed-off-by: Rajendra Nayak <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sc7180.dtsi | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index c754b4bf3273..97cfc113c9b3 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -214,6 +214,42 @@ next-level-cache = <&L3_0>; }; }; + + cpu-map { + cluster0 { + core0 { + cpu = <&CPU0>; + }; + + core1 { + cpu = <&CPU1>; + }; + + core2 { + cpu = <&CPU2>; + }; + + core3 { + cpu = <&CPU3>; + }; + + core4 { + cpu = <&CPU4>; + }; + + core5 { + cpu = <&CPU5>; + }; + + core6 { + cpu = <&CPU6>; + }; + + core7 { + cpu = <&CPU7>; + }; + }; + }; }; memory@80000000 { |